{"id":1657286,"url":"https://alion.io/job/nxp-semiconductors-principal-analog-ic-layout-engineer","title":"Principal Analog IC Layout Engineer","company":{"id":17368,"name":"NXP Semiconductors","domain":"nxp.com","url":"https://alion.io/company/nxp","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":77,"open_postings":181,"ghost_share":0,"stale_share":0.934,"repost_share":0,"time_to_fill_p50_days":34,"computed_at":"2026-10-20T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Nijmegen, Netherlands"],"countries":["NL"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":97000,"max_usd":221000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":741},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Virtuoso","optional":false}],"status":"live","first_seen_at":"2026-10-01T00:00:00Z","employer_posted_date":"2026-10-01","last_verified_at":"2026-10-20T11:08:42Z","board_verified":true,"closed_at":null,"days_open":19,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":19},"description":"About the Team\nNXP Semiconductors is seeking a Principal Analog IC Layout Engineer to join the Central Layout Group serving the Power & Energy Business Line, with a primary focus on Automotive Power Solutions (APS).\nThe role will support multiple automotive and industrial product lines worldwide and contribute to the successful development of advanced mixed-signal and power management semiconductor solutions.\nRole Summary\nThe successful candidate will provide senior technical expertise in Analog IC Layout, driving complex developments across multiple projects while contributing to technology deployment, layout methodologies and organizational capability growth.\nKey Responsibilities\nLayout and Technology Leadership\nLead complex Analog and Mixed-Signal layout developments.\nDrive floorplanning and top-level implementation strategies.\nSupport deployment of new technologies and layout methodologies.\nEnsure high quality and manufacturable layout solutions.\nProject and Product Support\nSupport multiple projects simultaneously.\nIdentify and mitigate layout-related project risks.\nDrive technical reviews and sign-off readiness.\nContribute to silicon bring-up support and root-cause analysis activities.\nMethodology and Community Development\nDrive continuous improvement initiatives.\nDevelop and promote layout best practices.\nContribute to training and mentoring of engineers.\nSupport worldwide alignment on methodologies and standards.\nRequired Skills\nMaster Degree in Electrical Engineering, Electronics, Physics or Microelectronics.\nExtensive experience in Analog IC Layout.\nExpertise with Cadence Virtuoso, Calibre and sign-off methodologies.\nStrong experience in mixed-signal and power management products.\nProven track record delivering complex developments from concept to tape-out.\nExcellent communication and technical leadership skills.\nFluent English.\nPreferred Qualifications\nBCD and High Voltage technology expertise.\nReliability, ESD and EMC layout experience.\nAutomation and scripting experience.\nExperience driving cross-site engineering collaboration.\nAutomotive semiconductor experience.\nMore information about NXP in the Netherlands...\n#LI-f5d0","description_format":"text","description_chars":2170,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[{"language":"English","level":"Advanced (C1)","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Artificial Intelligence","Science & Engineering","Electrical & Electronic Engineering","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-10-02T02:08:27Z"}],"visa":[],"liveness":{"score":54,"band":"ok","label":"Likely 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