{"id":3328601,"url":"https://alion.io/job/nxp-semiconductors-senior-dft-designer","title":"Senior DFT Designer","company":{"id":17368,"name":"NXP Semiconductors","domain":"nxp.com","url":"https://alion.io/company/nxp","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":174,"ghost_share":0,"stale_share":0.632,"repost_share":0,"time_to_fill_p50_days":44,"computed_at":"2026-10-28T05:59:10Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":20000,"max_usd":54000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":18},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-10-27T11:17:24Z","employer_posted_date":"2026-10-27","last_verified_at":"2026-10-28T11:58:27Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"Job Summary\nSeeking an experienced Senior DFT Designer to contribute to the development of cutting-edge mixed-signal and digital integrated circuits. This role involves responsibility for designing, implementing, and verifying DFT architectures for complex SoCs working closely with RTL, physical design, verification, product and test teams to ensure robust testability and high-quality silicon.\nJob Responsibilities\nLead and execute the full DFT design flow, including specification definition, architectural design, RTL coding (Verilog/SystemVerilog), synthesis, static timing analysis (STA), verification.\nDevelop and integrate scan insertion, test compression, and ATPG patterns.\nImplement memory BIST strategies.\nCollaborate closely with digital, analog, mixed-signal, product, test and software teams.\nCollaborate with RTL and physical design teams for DFT insertion and timing closure.\nDevelop and implement innovative DFT architectures and design methodologies to meet challenging performance, power, area and quality targets.\nOptimize test coverage, pattern count and test time.\nPerform comprehensive DFT verification at RTL and gate level.\nWork with ATE teams for test program development and silicon bring-up.\nParticipate in post-silicon validation and debug activities, identifying and resolving issues to ensure product quality.\nMentor junior engineers, provide technical guidance, and contribute to continuous improvement of DFT design processes and methodologies.\nGenerate detailed design documentation, including specifications, test plans, and design reviews.\nStay abreast of industry trends, emerging technologies, and best practices in digital IC design.\nRequirements\nBachelor or master degree in microelectronics, ECE or related\nStrong expertise in DFT methodologies: Scan, MBIST, LBIST, JTAG.\nHands-on experience with industry standard ATPG tools.\nProficiency in UPF/CPF-based low-power DFT.\nKnowledge of fault models (stuck-at, transition, path delay).\nFamiliarity with physical design constraints for DFT.\nExperience in silicon debug and ATE bring-up\nKnowledge of Verilog, SystemVerilog, VHDL\nStrong commitment to schedule and quality, a good team player\n More information about NXP in India...\n#LI-9415","description_format":"text","description_chars":2227,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","RF & Wireless Hardware","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-10-27T11:17:24Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely 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