{"id":1936266,"url":"https://alion.io/job/nxp-semiconductors-senior-soc-design-for-test-engineer","title":"Senior SOC Design For Test Engineer","company":{"id":17368,"name":"NXP Semiconductors","domain":"nxp.com","url":"https://alion.io/company/nxp","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":77,"open_postings":211,"ghost_share":0,"stale_share":0.924,"repost_share":0,"time_to_fill_p50_days":34,"computed_at":"2026-10-19T05:45:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Grenoble, France","Sophia Antipolis, France"],"countries":["FR"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":57000,"max_usd":101000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":15},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Synopsys TestMAX","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Tessent","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-10-05T23:41:52Z","employer_posted_date":"2026-10-05","last_verified_at":"2026-10-18T11:54:19Z","board_verified":true,"closed_at":null,"days_open":13,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":13},"description":"Job Summary\nNXP Semiconductors is seeking an experienced and motivated Senior Design For Test (DFT) Engineer to join the AI and Chip Engineering (ACE) team. In this role, you will define, implement, verify, and support advanced DFT solutions for complex SoC products developed in leading-edge semiconductor technologies for Automotive and Industrial applications.\nWorking closely with design, verification, product engineering, and manufacturing teams, you will contribute to the delivery of cost-effective, high-quality DFT architectures and manufacturing test solutions that ensure robust product quality and test coverage.\nKey Responsibilities\nDefine and implement Digital Design For Test (DFT) architectures and solutions at IP, subsystem, and SoC level based on product requirements and specifications.\nDevelop and integrate DFT features including Scan, ATPG, Memory BIST, Logic BIST, JTAG, and related test structures.\nAlign DFT implementation across SoC platforms and IP blocks to ensure efficient, scalable, and high-quality test solutions.\nDevelop and execute ATPG patterns to achieve target fault coverage for Stuck-At, Transition Delay, Memory BIST, and Logic BIST testing.\nPerform DFT verification, simulations, and validation activities to ensure the correctness and effectiveness of implemented test solutions.\nCollaborate with design, verification, physical design, and product engineering teams throughout the development cycle to ensure testability requirements are met.\nSupport silicon bring-up activities and participate in post-silicon evaluation to ensure manufacturing test patterns are operational from first silicon.\nAnalyze test results, debug failures, identify root causes, and drive yield and quality improvements.\nWork with manufacturing and ATE teams to enable efficient production test flows.\nEvaluate and adopt new DFT methodologies, tools, and industry best practices to improve test quality, coverage, and cost efficiency.\nDocument DFT architecture, implementation details, verification strategies, and test plans.\nProvide technical leadership and mentorship to junior engineers when appropriate.\nQualifications\nRequired\nBachelor's or Master's degree in Electrical Engineering, Computer Engineering, Microelectronics, or a related field.\nStrong experience in DFT design and verification for complex ASIC or SoC products.\nSolid understanding of DFT methodologies including: Scan DesignATPGMemory BISTLogic BISTJTAG / Boundary Scan\nExperience with industry-standard DFT tools such as Synopsys TestMAX, Cadence Modus, or Siemens Tessent.\nGood understanding of digital design fundamentals, ASIC/SoC development flows, and semiconductor manufacturing test concepts.\nExperience with Verilog/SystemVerilog.\nAI Driven programming or scripting skills using TCL, Python, Perl, or similar languages.\nStrong analytical and problem-solving skills.\nEffective communication and collaboration skills in a multidisciplinary environment.\nPreferred\nExperience supporting silicon bring-up and post-silicon debug activities.\nExperience in driving DFT conception and development with AI tools.\nFamiliarity with ATE test development and manufacturing test flows.\nKnowledge of advanced semiconductor process technologies.\nExperience working on Automotive or Industrial semiconductor products.\nWhy Join NXP?\nAt NXP, we develop innovative semiconductor solutions that power secure connections and infrastructure for a smarter world. Our technologies can be found in vehicles, mobile devices, industrial systems, and countless connected applications. Joining the ACE team offers the opportunity to work on cutting-edge SoCs, collaborate with world-class engineering teams, and contribute to products that make life easier, safer, and more connected.\nMore information about NXP in France...\n#LI-7795","description_format":"text","description_chars":3805,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response","Artificial Intelligence","Science & Engineering","Electrical & Electronic Engineering"],"lifecycle":[{"event":"open","at":"2026-10-05T23:41:52Z"}],"visa":[],"liveness":{"score":54,"band":"ok","label":"Likely open","p_open":1,"p_active":0.599,"p_room":0.9,"age_days":13,"expected_fill_days":34,"reasons":["conf:17","stale_co","velocity","win:mid","comp:brand"],"computed_at":"2026-10-19T05:45:15Z"},"pay":null,"html_url":"https://alion.io/job/nxp-semiconductors-senior-soc-design-for-test-engineer","json_url":"https://alion.io/job/nxp-semiconductors-senior-soc-design-for-test-engineer.json","meta":{"generated_at":"2026-10-19T18:03:30Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":13917,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-20T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":17368},"rest":"https://alion.io/mcp/rest/get_company?id=17368"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fnxp-semiconductors-senior-soc-design-for-test-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fnxp-semiconductors-senior-soc-design-for-test-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fnxp-semiconductors-senior-soc-design-for-test-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/nxp-semiconductors-senior-soc-design-for-test-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fnxp-semiconductors-senior-soc-design-for-test-engineer"}]}