{"id":2288675,"url":"https://alion.io/job/nxp-semiconductors-soc-physical-designer","title":"SoC Physical Designer","company":{"id":17368,"name":"NXP Semiconductors","domain":"nxp.com","url":"https://alion.io/company/nxp","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":83,"open_postings":182,"ghost_share":0,"stale_share":0.665,"repost_share":0,"time_to_fill_p50_days":42,"computed_at":"2026-10-24T06:02:35Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Tianjin, China"],"countries":["CN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":18000,"max_usd":47000,"period":"year","method":"role_country_seniority_unknown","sample_n":167},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Cadence Innovus","optional":false},{"name":"Linux","optional":false},{"name":"Machine Learning","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Siemens Calibre","optional":false},{"name":"Synopsys Fusion Compiler","optional":false},{"name":"Synopsys PrimeTime","optional":false},{"name":"Unix","optional":false}],"status":"live","first_seen_at":"2026-10-11T16:29:07Z","employer_posted_date":"2026-10-11","last_verified_at":"2026-10-22T03:22:24Z","board_verified":false,"closed_at":null,"days_open":13,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":13},"description":"As a Graduate Physical Design Engineer, you will participate in the development of advanced semiconductor products and be involved in the complete physical implementation flow.\nYour responsibilities include:\nSupport SoC and subsystem physical design implementation from netlist to GDSII.\nParticipate in floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and chip finishing activities.\nPerform timing, power, signal integrity, and physical verification analysis.\nDebug design implementation issues and drive convergence toward project PPAC (Performance, Power, Area, Cost) targets.\nWork with cross-functional teams including RTL Design, DFT, Verification, IP, Package, and Technology teams.\nDevelop and improve EDA automation scripts using Python, Tcl, or other scripting languages.\nExplore AI-assisted design methodologies to improve engineering productivity and design quality.\nSupport silicon bring-up, design reviews, and tapeout activities.\nContribute to continuous improvement of backend methodologies, flows, and best practices.\nQualifications：\nMaster's degree (graduating in 2027) in:Microelectronics\nIntegrated Circuit Design\nElectronic Engineering\nComputer Engineering\nAutomation\nRelated disciplines\n\nBasic knowledge of VLSI design flow and semiconductor fundamentals.\nFamiliarity with Linux/Unix environments.\nProgramming experience in Python, Tcl, Perl, Shell, or C/C++.\nStrong analytical and problem-solving skills.\nGood communication and teamwork skills.\nFluent written and spoken English.\nPreferred\nCoursework or project experience in:ASIC/SoC Design\nPhysical Design\nTiming Analysis\nDFT\nDigital IC Design\n\nHands-on experience with EDA tools such as:Synopsys Fusion Compiler\nICC2\nPrimeTime\nCadence Innovus\nTempus\nCalibre\n\nExperience with machine learning or AI applications in semiconductor design.\nPublications, competitions, or research projects related to EDA or IC design are a plus.\n More information about NXP in Greater China...\n#LI-6650","description_format":"text","description_chars":1985,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[{"language":"English","level":"All levels","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response","Artificial Intelligence","Science & Engineering","Electrical & Electronic Engineering"],"lifecycle":[{"event":"open","at":"2026-10-11T16:29:07Z"}],"visa":[],"liveness":{"score":55,"band":"ok","label":"Likely open","p_open":0.9,"p_active":0.614,"p_room":1,"age_days":12,"expected_fill_days":42,"reasons":["conf:50","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-24T06:02:35Z"},"pay":null,"html_url":"https://alion.io/job/nxp-semiconductors-soc-physical-designer","json_url":"https://alion.io/job/nxp-semiconductors-soc-physical-designer.json","meta":{"generated_at":"2026-10-24T22:56:01Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":33662,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-25T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":17368},"rest":"https://alion.io/mcp/rest/get_company?id=17368"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fnxp-semiconductors-soc-physical-designer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fnxp-semiconductors-soc-physical-designer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fnxp-semiconductors-soc-physical-designer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/nxp-semiconductors-soc-physical-designer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fnxp-semiconductors-soc-physical-designer"}]}