{"id":150723,"url":"https://alion.io/job/omni-design-technologies-digital-design-leadmanager","title":"Digital Design Lead/Manager","company":{"id":8204,"name":"Omni Design Technologies","domain":"omnidesigntech.com","url":"https://alion.io/company/omni-design-technologies","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Lever","truth_index":{"grade":"D","score":40,"open_postings":46,"ghost_share":1,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-10-21T05:46:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hyderabad, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":24000,"max_usd":55000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":741},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SAS","optional":false},{"name":"SystemC","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2025-01-06T16:07:24Z","employer_posted_date":"2025-01-06","last_verified_at":"2026-10-21T04:34:41Z","board_verified":true,"closed_at":null,"days_open":652,"trust":{"level":"ghost","repost_count":0,"flags":["stale","company_stale"],"days_open":652},"description":"Omni Design is working on exciting solutions and chips for next generation automotive and space applications and looking for talented and capable engineers.\nThe Manager of digital and mixed-signal engineering will be responsible for development of mixed-signal SOC being developed at ODT and build the digital engineering team and will work Analog/RF engineering, FW engineering, verification, Systems Validation team, Operations, SOC Architects, and report to the Director of ASIC Engineering.\nRoles and Responsibilities\nManage digital team, hire, and retain best talent\nLead SOC integration design team to develop and productize next generation mixed-signal RF/communication SOCs\nWork with cross-functional project teams to define product specifications, system architecture, HW/SW partitioning, and execution plan\nImplement best SoC development practices and improve design methodology to maximize efficiency and predictability\nDeliver chip architecture, design, integration, programming model, verification, and manage hand-off to backend\nSupport Silicon and System Validation, support system integration, and production testing\nDrive innovation and provides leadership to the organization to ensure world-class system solutions and flawless execution\nQualifications\nBSEE Required, MSEE Preferred\nProven track record of success in high-performance/high-volume semiconductor industry\nSoC, embedded CPU and bus architectures, networking, and control interfaces\n Communications / DSP algorithms and power / area efficient implementations\n Digital IC design, design for low power and high speed, design for test (DFT)\n System modeling, RTL coding, Lint / CDC checking, simulation, synthesis, power analysis, timing analysis in Cadence / Synopsys design environments\nDirected and constrained random verification, UVM methodology\nEmbedded systems FPGA emulation, lab debug and chip validation\nProject planning and execution, and performing design tradeoffs to achieve performance, power, die size, and schedule targets\nSelf-motivated, excellent communication skills, and ability to excel and to provide leadership in a fast-paced environment\nSenior Management experience preferred\nWork with architecture, physical design, and design teams to lead the implementation of the digital architecture.\nDevelop and refine specification of the micro-architecture for the digital architecture.\nIs in tune with industry trends and contributes to consistent roadmap decisions.\nExperience\n10+ years of experience in the area of RTL design and verification of silicon\nAt Least 3+ years experience in leading low-power mixed-Signal SOC design \n10+ years of experience with FPGA architecture specification and design (Altera or Xilinx) for high-speed serial protocols, including USB-SS, PCIe, SATA/SAS, DisplayPort\nExperience in leading, specifying, and work with Analog/RF team in developing, verifying, and productizing SERDES, CDR, and PLL/DLL designs\nExperience with USB 3.0, DisplayPort, PCIe, or SATA based silicon designs preferred\nStrong background in analog/mixed-signal integrated SOC Development\nStrong Hardware design knowledge and familiarity with signal integrity\nStrong foundation in SoC architecture, design, verification and physical implementation\nStrong analytical problem solving, and attention to details\nKnowledge of wireless, mobile, and storage domains\nExpertise in Verilog/System Verilog, C/C++/SystemC, UVM, Scripting languages like Perl/Python, etc.\nExcellent technical documentation skills\nExcellent written and verbal communication skills\nExcellent interpersonal skills, self-motivated, self-starter\nExperience in startup environment\nExpectations\nPut the RTL for the Full chip together.\nEvaluate the IP we have to license - like PCIe, LPDDR4, JESD 204C PHY\nHelp develop any BIST\nWork with Verification Team to develop the FC Simulation test suites\nDevelop the RTL for the various state machines and interfaces\nRun a few of the simulations\nHelp with the FC simulations debug\nHelp close the timing issues if any come up and work with the PD person to resolve any SI issues.\nBe a mentor and lead a team of Digital design engineers\nWork with Systems and Test engineering team to help validate the parts and release them to production","description_format":"text","description_chars":4240,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"India","iso":"IN","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Analog & Power Semiconductors","Semiconductor IP & Chip Design Services"],"lifecycle":[],"visa":[],"liveness":{"score":7,"band":"cold","label":"Long shot","p_open":1,"p_active":0.251,"p_room":0.28,"age_days":652,"expected_fill_days":33,"reasons":["conf:1","stale_co","ghost","win:tail","crowd:"],"computed_at":"2026-10-21T05:46:15Z"},"pay":null,"html_url":"https://alion.io/job/omni-design-technologies-digital-design-leadmanager","json_url":"https://alion.io/job/omni-design-technologies-digital-design-leadmanager.json","meta":{"generated_at":"2026-10-21T06:53:19Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":9725,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-22T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":8204},"rest":"https://alion.io/mcp/rest/get_company?id=8204"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fomni-design-technologies-digital-design-leadmanager"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fomni-design-technologies-digital-design-leadmanager"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fomni-design-technologies-digital-design-leadmanager"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/omni-design-technologies-digital-design-leadmanager\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fomni-design-technologies-digital-design-leadmanager"}]}