Salary
≈ $15k – $35k per year (Estimated)
Location
Hybrid (Bengaluru, Hyderabad, India, Austin, Milpitas, United States)
Seniority
Junior · 2+ years exp
Employment
Full-Time
Confirmed on the employer's own hiring board on Oct 26, 2026. First seen by Alion on Jun 20, 2020. Omni Design Technologies scores D on the Alion truth index.
Overview
Company
Impact
Profile match
Omni Design Technologies is a semiconductor IP company that licenses high-performance, low-power analog and mixed-signal IP cores, including data converters for wideband signal processing, built on advanced FinFET process nodes. Its IP is integrated into system-on-chip designs for wireless, automotive, optical networking and AI applications, with design centres in Bengaluru, Hyderabad, Taipei, Fort Collins and Lisbon. The company is headquartered in Milpitas, California, United States.
Digital Design Engineer focusing on high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include RTL design, verification, behavioral modelling, support and assist with synthesis, timing closure and P&R flow for the digital controller for high performance data converters in cutting edge technologies.
Qualifications
- BS/BE/MS/MTech + 2 years or equivalent experience in high-performance digital or mixed-signal IC development in advanced CMOS processes
- Strong foundation in digital design concepts for complex ASICs
- Hands on experience with the Verilog RTL coding including state machines, adders, multipliers, combinatorial logic, etc
- Strong understanding of digital design for mixed signal control loops and designing Verilog code to control analog circuits (e.g. digital backend for ADC, digital PLL, etc)
- Familiarity with behavioral Verilog code, including wreals
- Ability to write thorough testbenches
- Basic understanding of SystemVerilog and assertions preferred
- Basic understanding of signal processing - MATLAB understanding would be preferred but not mandatory
- Understanding of constraints, especially for mixed-signal designs, including multiple clock domains and clock gating
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