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Salary
≈ $92k – $213k per year (Estimated)
Location
In office (Sydney)
Seniority
Senior
Employment
Full-Time

Confirmed on the employer's own hiring board on Oct 5, 2026. First seen by Alion on Sep 29, 2026. One moment, please... scores B on the Alion truth index.

Overview
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About the role

Join Q-CTRL to help turn cutting-edge quantum sensing technology into robust devices that can operate in the real world. As a Senior FPGA and Embedded Software Engineer, you will develop the real-time digital and firmware stack behind our quantum accelerometers, working where advanced hardware, control systems and fundamental science meet.

You will partner closely with research scientists and engineers to understand how the whole sensor works, then make it more capable and reliable. This is a role for a curious, versatile engineer who enjoys getting close to the hardware and learning new domains quickly. You do not need to arrive with experience in every technology listed below: we value strong fundamentals, thoughtful problem-solving and the drive to learn.

What you'll be doing:

  • Develop, integrate, optimise and support FPGA firmware for Q-CTRL quantum sensors.Implement and maintain timing-critical digital processing blocks, including filters, decimation and related DSP pipelines.
  • Build robust startup, calibration, operation and monitoring routines for autonomous sensor operation.
  • Work with research scientists to translate control concepts into reliable, real-time behaviour close to the hardware.
  • Integrate FPGA logic with SoC software, enabling reliable, time-synchronised high-bandwidth data capture, DMA transfer and storage.
  • Establish and improve simulation and hardware-in-the-loop testing to support continuous integration and confident field deployment.
  • Investigate system-level issues across FPGA logic, firmware, electronics, embedded Linux and higher-level software.
  • Contribute to architecture decisions that improve reliability and performance in future sensor revisions.
  • Document test, validation and operational procedures as part of delivering the quantum sensor package.

Ideally you'll have:

  • Strong foundations in digital design and embedded systems.
  • Familiarity with SystemVerilog for implementing and maintaining FPGA logic.
  • Experience with Xilinx SoCs and Vivado-based development workflows.
  • Digital signal processing experience, including practical implementation of filters, decimation or related signal-conditioning pipelines.
  • Experience with simulation and verification workflows such as cocotb.
  • Familiarity with CI/CD development processes for testing, validation and deployment.
  • Some familiarity with systems programming languages (for example C, C++ or Rust) to interface with FPGA data paths, including DMA-based transfer.
  • Curiosity about complex systems and the persistence to understand how hardware, firmware, software and physics interact.
  • Experience with, or enthusiasm to learn, timing-critical control systems and high-bandwidth data capture or storage.
  • Familiarity with low-latency and low-level communications such as TCP/IP, SPI, I2C or CAN bus.
  • Exposure to embedded Linux, customised operating systems or Yocto is useful, but not essential.
  • Familiarity with GitHub Actions and CI/CD workflows for cloud testing and deployment.
  • A collaborative approach and the ability to work effectively with engineers and research scientists in an evolving technical environment.
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