{"id":1583199,"url":"https://alion.io/job/onsemi-layout-engineer-power-modules","title":"Layout Engineer, Power Modules","company":{"id":58717,"name":"onsemi","domain":"onsemi.com","url":"https://alion.io/company/onsemi","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Oracle","truth_index":{"grade":"B","score":82,"open_postings":164,"ghost_share":0,"stale_share":0.909,"repost_share":0,"time_to_fill_p50_days":12,"computed_at":"2026-10-01T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":19000,"max_usd":44000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":536},"experience_years_min":4,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"AI Agents","optional":false},{"name":"Cadence Virtuoso","optional":false},{"name":"KLayout","optional":false},{"name":"Linux","optional":false},{"name":"Python","optional":false},{"name":"Siemens Calibre","optional":false},{"name":"Function Calling","optional":true},{"name":"Tool Use","optional":true}],"status":"live","first_seen_at":"2026-10-01T06:44:08Z","employer_posted_date":"2026-10-01","last_verified_at":"2026-10-01T13:43:34Z","board_verified":true,"closed_at":null,"days_open":0,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":0},"description":"We are looking for a hands-on Layout Engineer to join our AI-native product development team at onsemi. You will design silicon interposer and power-module layouts, and help turn that design practice into layout-authoring capabilities on our internal engineering platform.\nThe role covers the path from floorplan and PDK-based layout through verification and tapeout, with enough automation knowledge to define what an AI agent must be able to do at each step.\nYou will own selected module layouts, judge whether generated or edited layouts are electrically and physically sound, and work with software engineers on the tool actions, checks, and review flow the platform needs. AI experience is useful, but layout judgment and knowledge of the onsemi design flow are the core of the role.\n# LI-VS1\n Key Responsibilities\nDesign and edit power-module and silicon-interposer layouts, including die placement, power and signal routing, pads, and top-level assembly, using the relevant PDK and IP views.\nOwn assigned module layouts from floorplan through implementation, and keep layout decisions traceable across variants and revisions.\nRun and interpret DRC, LVS, and parasitic extraction, and use the results to correct layout before it moves downstream.\nPrepare layouts for design release: stream-out, database transfer, and the evidence expected at tapeout.\nUse KLayout for layout review and scripted edits, and help extend the same workflow to Cadence Virtuoso and the other tools used for power-module development.\nIdentify the tool actions an AI agent needs in order to create, edit, inspect, and check a layout, including required inputs, safe bounds, and expected outputs.\nValidate AI-produced layouts against the source design, PDK rules, connectivity, and known-good results. Reject output that is geometrically valid but electrically or physically wrong.\nContribute layout requirements to platform feature discussions, including candidate review, violation markup, net tracing, and revision comparison.\nCapture layout practices, layer and design-rule knowledge, and tapeout checks that currently depend on individual designers, so they can be reused by engineers and AI agents.\nWork with simulation, model-generation, and software engineers so layout, extraction, and model inputs stay consistent through the design flow.\n# LI-VS1\n Required Skills\n4 to 8 years of hands-on IC or power-module layout, including released or tapeout-ready work.\nStrong Cadence Virtuoso Layout experience, including Layout XL, schematic-driven layout, and PDK or PCell-based design.\nPractical use of Siemens Calibre for DRC and LVS, and working knowledge of PEX or another parasitic-extraction flow.\nUnderstanding of how floorplan, placement, routing, pads, and top-level assembly affect resistance, loop inductance, current density, and thermal behavior in a power module.\nExperience taking a layout through stream-out and database transfer, with familiarity with Cliosoft SOS or an equivalent design-data system.\nAbility to inspect GDS or OASIS and make controlled edits with KLayout, Calibre DESIGNrev, or equivalent layout tooling.\nEnough Python or SKILL to automate repetitive layout, query, or checking tasks, and to explain a manual tool action clearly enough for a software engineer to implement it.\nCareful review of generated layout against design intent, design rules, and connectivity, including the judgment to reject a result that only looks correct.\nClear communication with layout, simulation, CAD, and software engineers, and comfort working from Linux design environments.\nPreferred Skills\nLayout experience with SiC or other wide-bandgap multi-die power modules, silicon interposers, or heterogeneous integration.\nFamiliarity with the onsemi power-module flow across die, interposer, package, and system, including Ansys Q3D, R3D, and thermal or mechanical checks driven by layout.\nExperience with Virtuoso SKILL, Python layout APIs, or batch verification flows.\nExposure to pads and ESD, bonding-diagram generation, reticle or database release, and fab or process feedback.\nInterest in AI-assisted layout, AI agent tool use, or reviewing AI-generated engineering output. Prior AI product experience is not required.\nExperience contributing design-rule, PDK, or layout-review knowledge to an internal platform or automation project.\n# LI-VS1","description_format":"text","description_chars":4347,"description_truncated":false,"requirements":{"experience_years_min":4,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Analog & Power Semiconductors","Machine Vision & 3D Cameras"],"lifecycle":[{"event":"open","at":"2026-10-01T13:43:34Z"}],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":0,"expected_fill_days":12,"reasons":["conf:7","win:early","comp:brand"],"computed_at":"2026-10-01T21:07:31Z"},"pay":null,"html_url":"https://alion.io/job/onsemi-layout-engineer-power-modules","json_url":"https://alion.io/job/onsemi-layout-engineer-power-modules.json","meta":{"generated_at":"2026-10-01T21:07:31Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":3680,"day_limit":5000,"remaining_today":1320,"minute_limit":60,"resets_at":"2026-10-02T00:00:00Z"}}}