{"id":165002,"url":"https://alion.io/job/onsemi-principal-asic-design-engineer","title":"Principal ASIC Design Engineer","company":{"id":58717,"name":"onsemi","domain":"onsemi.com","url":"https://alion.io/company/onsemi","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Oracle","truth_index":{"grade":"B","score":77,"open_postings":164,"ghost_share":0,"stale_share":0.902,"repost_share":0,"time_to_fill_p50_days":25,"computed_at":"2026-10-16T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":29000,"max_usd":66000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":696},"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Python","optional":false},{"name":"Synopsys Design Compiler","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-01-19T00:00:00Z","employer_posted_date":"2026-10-13","last_verified_at":"2026-10-16T19:46:38Z","board_verified":true,"closed_at":null,"days_open":270,"trust":{"level":"stale","repost_count":1,"flags":["stale"],"days_open":270},"description":"About onsemi\nonsemi (Nasdaq: ON) is a global leader in intelligent power and sensing technologies, driving innovation to build a safer, cleaner, and smarter world. With a strong focus on automotive, industrial, and AI data center markets, we are shaping the future of vehicle electrification, sustainable energy, and advanced automation.\nAbout the Treo Platform\nThe newly launched Treo Platform is a cutting-edge analog and mixed-signal solution built on 65nm Bipolar-CMOS-DMOS (BCD) technology. Supporting voltage ranges from 1-90V and operating temperatures up to 175°C, Treo is engineered for high-performance applications in automotive, medical, industrial, and AI data centers. Its modular architecture simplifies design, reduces system costs, and accelerates time-to-market. All products are manufactured at our state-of-the-art 300mm fab in East Fishkill, NY.\nYour Role\nYou would be working on a Sub-System of the Treo platform. We are seeking a seasoned Digital Design Expert to lead a Sub-System for the platform. This is a unique opportunity to shape the Sub-System of a transformative technology platform within a dynamic, global organization.\nKey Responsibilities\nMicro architect, implement and verify the digital Sub-System\nInteract with multiple cross functional teams on requirements and deliverables.\nLead design and verification planning and ensure design testability\nPerform hands-on RTL coding and scripting for any automation.\nEnsure the IP meets the ASIL requirements.\nDrive innovation and standardization.\nWhat you need\nBE/ME in electronics or related technical field.\nAt least 7 years of relevant experience in semiconductor product development.\nProven expertise in SoC architecture, IP selection, RTL design and verification\nStrong grasp of digital design principles: FSMs, timing analysis, combinational/sequential logic\nProficiency in Verilog/System Verilog\nFamiliarity with tools: Lint, CDC, RDC, Design Compiler\nExperience with standard interfaces: APB, AHB, AXI, SPI, I2C, DMA\nDesign techniques: pipelining, low latency, power optimization\nExperience writing high-quality technical documentation\nProficiency in scripting languages: Python, PERL\nExperience leading small projects\nAbility to write specifications from high-level requirements\nUnderstanding of DFT, Functional Safety (FuSa)\nShould have good analytical skills for debug work needed during verification.\nPreferred Qualifications\nExperience with AI-driven digital design tools\nExposure to platform standardization and IP reuse strategies\nWhy Join Us\nWe create a diverse set of world-class products in a friendly and team-oriented atmosphere. We provide an environment of continual learning and growth opportunities and support volunteer and charitable programs. We offer competitive benefit package and a great place to work. You will be able to build up a career in a successful international company, and you can participate in interesting international projects.","description_format":"text","description_chars":2954,"description_truncated":false,"requirements":{"experience_years_min":7,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":["Growth opportunities"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Analog & Power Semiconductors","Machine Vision & 3D Cameras"],"lifecycle":[{"event":"open","at":"2026-01-19T00:00:00Z"},{"event":"close","at":"2026-10-08T01:09:51Z"},{"event":"reopen","at":"2026-10-13T13:49:59Z"}],"visa":[],"liveness":{"score":5,"band":"cold","label":"Long shot","p_open":1,"p_active":0.186,"p_room":0.28,"age_days":270,"expected_fill_days":25,"reasons":["conf:1","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-16T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/onsemi-principal-asic-design-engineer","json_url":"https://alion.io/job/onsemi-principal-asic-design-engineer.json","meta":{"generated_at":"2026-10-16T22:51:29Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":4538,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-17T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":58717},"rest":"https://alion.io/mcp/rest/get_company?id=58717"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fonsemi-principal-asic-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fonsemi-principal-asic-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fonsemi-principal-asic-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/onsemi-principal-asic-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fonsemi-principal-asic-design-engineer"}]}