{"id":3645198,"url":"https://alion.io/job/onsemi-principal-digital-design-engineer-3","title":"Principal Digital Design Engineer","company":{"id":58717,"name":"onsemi","domain":"onsemi.com","url":"https://alion.io/company/onsemi","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Oracle","truth_index":{"grade":"B","score":77,"open_postings":190,"ghost_share":0,"stale_share":0.911,"repost_share":0,"time_to_fill_p50_days":33,"computed_at":"2026-11-04T06:34:25Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Allen, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false}],"status":"live","first_seen_at":"2026-11-02T18:50:42Z","employer_posted_date":"2026-11-02","last_verified_at":"2026-11-04T18:56:56Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"We are seeking a Principal Digital Design Engineer based in Allen, TX, to own the IO subsystem for onsemi’s microcontroller platform. In this role, you will be responsible for defining, architecting, and delivering a highly configurable IO subsystem that supports a wide range of product requirements across multiple end markets.\nThis position plays a critical role in enabling platform scalability and product differentiation. The IO subsystem must be flexible, reusable, and optimized for performance, power, and area while supporting a wide range of product requirements.\nThe Principal Engineer will serve as the technical leader for the IO subsystem, driving architecture, RTL implementation, and design automation strategy, while partnering closely with system architecture, product lines, DFT, physical design, verification, and software teams. This role requires strong technical execution, cross-functional leadership, and the ability to influence platform direction.\n Own the architecture and development of the IO subsystem, ensuring configurability and reuse across multiple products\nDefine subsystem-level specifications, interfaces, and integration strategy aligned with platform and product requirements\nDefine and implement parameterized and Python generator-based design approaches, enabling scalable and configurable subsystem instantiation\nDrive the creation of automatically generated testbenches and verification environments, leveraging UVM frameworks and AI-assisted techniques\nDevelop high-quality SystemVerilog RTL, ensuring compatibility with automated generation flows and maintainability at scale\nSupport synthesis, STA, and timing closure activities to ensure signoff-ready designs\nCollaborate with verification, DFT, and physical design teams to achieve first-time right silicon\nApply AI/ML techniques to improve design productivity, including code generation assistance, verification acceleration, and design space exploration\nDrive PPA optimization while maintaining configurability and reuse targets\nEstablish best practices for design automation, code generation, and methodology standardization across the organization\n Bachelor’s degree in Electrical Engineering or related field (Master’s preferred)\n10+ years of experience in digital IC design with strong RTL development background\nExpert-level proficiency in SystemVerilog RTL design\nStrong experience with Python for design automation and tool development\nSolid experience with UVM-based verification methodologies and testbench development\nStrong understanding of UPF, synthesis, STA, and timing signoff flows\nExperience working with DFT concepts and integration\nStrong cross-functional collaboration skills across design, verification, physical design, and product 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