{"id":3533680,"url":"https://alion.io/job/onsemi-process-integration-engineer-2","title":"Process Integration Engineer","company":{"id":58717,"name":"onsemi","domain":"onsemi.com","url":"https://alion.io/company/onsemi","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Oracle","truth_index":{"grade":"B","score":79,"open_postings":207,"ghost_share":0,"stale_share":0.855,"repost_share":0,"time_to_fill_p50_days":33,"computed_at":"2026-11-06T05:58:05Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Gresham, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":143000,"max_usd":263000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":563},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"CVD","optional":false},{"name":"JMP","optional":false},{"name":"MATLAB","optional":false},{"name":"Photolithography","optional":false},{"name":"Plasma Etch","optional":false},{"name":"Python","optional":false},{"name":"TCAD","optional":false}],"status":"live","first_seen_at":"2026-10-30T15:29:06Z","employer_posted_date":"2026-10-30","last_verified_at":"2026-11-06T20:49:37Z","board_verified":true,"closed_at":null,"days_open":7,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":7},"description":"The Process Integration and Technology Development Engineer defines, develops, and implements silicon process technology for the manufacture of integrated silicon devices. The successful candidate will be responsible for unit/process module development, process flow implementation, design rule definition, device architecture, electrical characterization, and technology qualification. These tasks support new silicon technology developments and transfers of existing technologies in and out of the resident fab. Experience related to semiconductor processing in BCD, Discretes, and hybrid Smart Power technologies and knowledge of semiconductor device functions is required.\n Process Integration and Technology Development\nLead the development of unit processes and process modules for CMOS, BCD, Discretes, and hybrid Smart Power technologies. \nDefine and assess process module characterization to ensure robustness, manufacturability, and scalability. \nDevelop and maintain end-to-end technology process flows with detailed process specifications. \nDefine physical design rules and test structures for characterization.\nDrive process and device optimization to meet performance, reliability, and cost targets. \nDesign and analyze statistical experiments using DOE, regression, and AI-assisted methods to optimize device architecture and process modules. \nSupport intrinsic reliability studies, including gate oxide integrity, TDDB, HCI, EM, and stress migration, using both physics-based and data-driven approaches. \nManufacturing, Yield & Technology Transfer\nFacilitate process improvements and corrective actions for yield, reliability, and manufacturability issues using root-cause analysis and data mining and analysis. \nSupport Process Engineering and Yield Engineering teams to improve process quality and yield for technologies released to manufacturing. \nEnable smooth technology transfers into and out of the fab by using data-driven monitoring, excursion detection, and learning systems.\n Required\nMS or PhD in Electrical Engineering, Physics, Chemistry, Chemical Engineering, Materials Engineering, or related technical field. \nMinimum of 10 years’ experience in semiconductor manufacturing or process development or process integration in a semiconductor manufacturing environment.\nKnowledge of semiconductor processes such as oxidation, implant, deposition (CVD, PECVD, etc.), RIE, CMP, Lithography used in FEOL and BEOL wafer fabrication.\nExperience applying DOE, statistical analysis, and data analytics to semiconductor development. \nUnderstanding of semiconductor device physics and construction, including CMOS, DMOS, Bipolar, and Trench FET devices. \nStrong written and verbal communication skills with the ability to convey complex technical concepts clearly.\nProven problem-solving ability and strong collaboration skills in cross-functional teams. \nPreferred\nExperience with 180 nm through 40 nm technologies.\nKnowledge of intrinsic reliability testing methodologies, including GOI, VRamp, TDDB, HCI, EM, and SM. \nHands-on experience with process and device TCAD simulations. \nExperience designing and evaluating physical and electrical design rule test structures. \nFamiliarity with AI/ML techniques, data mining, or statistical modeling applied to semiconductor process or device data.\nExperience using scripting languages (e.g., Python, MATLAB, JMP, or equivalent) for data analysis, automation, or model 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