{"id":3703071,"url":"https://alion.io/job/onsemi-senior-analog-design-engineer-power-clock-ip","title":"Senior Analog Design Engineer – Power & Clock IP","company":{"id":58717,"name":"onsemi","domain":"onsemi.com","url":"https://alion.io/company/onsemi","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Oracle","truth_index":{"grade":"B","score":77,"open_postings":194,"ghost_share":0,"stale_share":0.912,"repost_share":0,"time_to_fill_p50_days":33,"computed_at":"2026-11-05T05:54:30Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Allen, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-11-03T16:27:57Z","employer_posted_date":"2026-11-03","last_verified_at":"2026-11-05T06:25:07Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"We are seeking a Senior Analog Design Engineer to develop power management and clocking IP for Treo-based SoCs. This role is a hands-on contributor expected to take ownership of complex analog blocks while collaborating across design, verification, and validation teams.\n Key Responsibilities\nDesign, simulate, and verify analog IP including LDOs, DC/DC converters, charge pumps, PLLs, DLLs, and oscillators.\nOwn analog blocks from specification through silicon validation.\nPerform schematic design, layout review, post-layout verification, and corner analysis.\nCollaborate with digital, validation, and technology teams during integration and bring-up.\nSupport lab characterization and post-silicon debugging.\nDocument designs and develop reusable IP methodologies.\nTools, Flows & Quality\nUse industry-standard schematic capture and SPICE/AMS simulation tools. Perform PVT, noise, jitter, reliability, and aging analysis as part of design sign-off.\nInnovation & Automation\nApply scripting and automation techniques to improve design efficiency and quality.\nSuccess Metrics\nOn-time delivery of analog IP blocks.\nHigh-quality silicon results with robust PVT coverage.\nStrong cross-functional collaboration and technical execution.\n Qualifications - Minimum\n5+ years of experience in analog IC design.\nExperience designing power management and/or clocking circuits.\nSolid understanding of analog circuit design, device physics, and layout effects.\nProficiency with SPICE/AMS simulation and mixed-signal verification.\nAbility to work independently and communicate technical issues effectively.\nQualifications - Preferred\nExperience with Verilog-A/AMS modeling.\nExposure to automotive or industrial applications.\nInterest in AI-assisted design and automation workflows.","description_format":"text","description_chars":1765,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Hardware","Electrical & Electronic Engineering","Power Supplies & Power Electronics","Machine Vision & 3D Cameras"],"lifecycle":[{"event":"open","at":"2026-11-03T20:15:23Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":1,"expected_fill_days":33,"reasons":["conf:5","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-11-05T05:54:30Z"},"pay":null,"html_url":"https://alion.io/job/onsemi-senior-analog-design-engineer-power-clock-ip","json_url":"https://alion.io/job/onsemi-senior-analog-design-engineer-power-clock-ip.json","meta":{"generated_at":"2026-11-05T08:46:20Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":11173,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-06T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":58717},"rest":"https://alion.io/mcp/rest/get_company?id=58717"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fonsemi-senior-analog-design-engineer-power-clock-ip"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fonsemi-senior-analog-design-engineer-power-clock-ip"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fonsemi-senior-analog-design-engineer-power-clock-ip"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/onsemi-senior-analog-design-engineer-power-clock-ip\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fonsemi-senior-analog-design-engineer-power-clock-ip"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3703071}},{"tool":"search_jobs","arguments":{"company":"onsemi.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3703071},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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