{"id":3172751,"url":"https://alion.io/job/opower-principal-electrical-engineer-3","title":"Principal Electrical Engineer","company":{"id":1813620,"name":"Opower","domain":"opower.com","url":"https://alion.io/company/opower","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Oracle","truth_index":{"grade":"B","score":83,"open_postings":90,"ghost_share":0,"stale_share":0.867,"repost_share":0.022,"time_to_fill_p50_days":18,"computed_at":"2026-10-26T05:57:25Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":114600,"max":234600,"currency":"USD","period":"year","gross":null,"usd_annual":234600},"salary_estimate":null,"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Cadence Allegro","optional":false},{"name":"NVLink","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-10-15T20:34:59Z","employer_posted_date":"2026-10-15","last_verified_at":"2026-10-26T10:29:17Z","board_verified":true,"closed_at":null,"days_open":10,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":10},"description":"Designs, develops, and integrates complex electrical systems for hardware products, ensuring they meet functional, performance, power efficiency, security, and reliability requirements. Completes parts selection, qualification, Field-Programmable Gate Array (FPGA) design, and schematic capture for electrical subsystems. Conducts testing, integration, and validation of analog and digital systems and subsystems. Develops technical documentation, including specifications, test plans, test reports, signal integrity constraints, and bills of materials. Remains up-to-date on advancements in electrical subsystem technologies, including industry standards, tools, and best practices.\n Key Responsibilities\nConceptual Design of Electrical Systems:\n-Designs, develops, and integrates complex electrical systems for hardware products, ensuring they meet functional, performance, efficiency, security, and reliability requirements across power, signal integrity, and board-level designs for cloud and rack-level systems in accordance with program requirements for cost and schedule.\nDetailed Design and Implementation:\n-Completes parts selection, qualification, Field-Programmable Gate Array (FPGA) design, and schematic capture for electrical subsystems, ensuring compliance with design specifications, manufacturability requirements, and industry standards.\n-Performs detailed design analysis of electrical systems independently, contributing to product development from concept to production.\n-Collaborates with Computer-Aided Design (CAD) designers to optimize board floor planning, ensuring accurate and efficient component placement, high-speed routing, and electromagnetic interference (EMI) mitigation.\n-Works with external vendors to source components, verify specifications, and resolve issues related to power management integrated circuits (PMICs), passive components, and high-speed interconnects.\n-Works closely with internal teams such as firmware, software, and diagnostics to ensure seamless integration of electrical subsystems with overall product functionality, addressing both power and signal integrity challenges.\nTesting, Validation, and Debugging:\n-Conducts integration, testing, and validation of digital systems and subsystems, ensuring stable and efficient operation under varying loads and environmental conditions.\n-Develops and maintains automation platforms for electrical subsystem validation, ensuring long-term reliability across product lifecycles.\n-Executes test plans, validates prototypes, and performs debugging of signal integrity issues and thermal management challenges, resolving complex technical problems.\n-Performs complex sustaining engineering activities such as resolving customer escalations, performing root cause analysis, qualifying alternate source components, and resolving end-of-life component issues.\nDocumentation and Process Development:\n-Develops technical documentation, including specifications, test plans, test reports, signal integrity constraints, and bills of materials, ensuring comprehensive records for future product iterations.\n-Leads and participates in formal design reviews, providing input on electrical subsystem performance, signal integrity considerations, and PCB layout trade-offs.\nContinuous Learning and Innovation:\n-Remains up-to-date on advancements in electrical subsystem technologies, including industry standards, tools, and best practices.\n-Identifies opportunities for innovation in electrical design, suggesting improvements for future product lines and driving adoption of cutting-edge techniques in electrical systems.\n-Shares expertise in electrical system design and testing with cross-functional teams to enhance overall product quality and performance.\nAdditional Responsibilities (as needed)\nElectromagnetic Compatibility:\n-Provides leadership to ensure that hardware products meet applicable safety, electromagnetic compatibility (EMC), and environmental regulations across global markets by independently applying regulatory knowledge throughout the development process.\n-Leads collaboration with design, test, and manufacturing teams to proactively integrate compliance requirements into hardware specifications, leads pre-compliance testing efforts, and coordinates with third-party labs to secure required certifications.\n-Monitors changes in international and regional regulatory landscapes, advises cross-functional teams on design implications, and drives updates to documentation and processes to maintain continuous global market access.\nThis team is responsible for the architecture, analysis, detailed design, development, integration, test, and delivery of Oracle servers based on the latest high-end server-grade merchant silicon. The systems delivered are integrated as building blocks for some of Oracle’s market leading and growing Cloud Systems & Appliances.\nAs a Principal Board Engineer, you will be responsible for designing and testing boards in new servers starting from system conception through system deployment in our cloud data centers. This position is not a design service group but rather on a product team with full ownership responsibilities!\nResponsibilities\nThe list of responsibilities (but not limited to) may include:\nParts selection and qualification.\nSchematic Capture.\nBoard Floor planning.\nProvide guidance to CAD designers (placement and routing). \nReview CAD work.\nLead and participate in formal design reviews.\nWork with SI and PI engineers on pre-layout planning based on simulations.\nAuthor HW specifications.\nPublish bill of materials.\nBring up and test prototypes.\nDevelop and implement test plans.\nMentor Junior Engineers.\nPerform and lead Lab debug of HW problems.\nLight FPGA work.\nAn engineer in this position must work closely with the System leads and Architects to ensure the overall system requirements are achieved. In this role, you will collaborate with Operations Engineering, Mechanical Engineering, Industrial Design, PCB layout designers, EMC Design, and External manufacturers to review and optimize designs. You must have a proven track record of designing and delivering high-quality, high-speed enterprise class products to market.\nQualifications\nProficient in the complete flow of CAD design tools such as Cadence, Concept, Allegro.\nProficient in constraint driven design methodologies.\nExperience with the use of high-performance server processors, GPUs and support FPGAs. \nExperience with interface controllers like GigE, USB, etc.\nExperience with high power on-board modern VRD designs.\nStrong knowledge and application of high-speed design methodologies for Signal Integrity is a must.\nExperience and understanding of effective PCB stack-up design is a must.\nExperience with high-speed buses to include:PCIe up to Gen5/Gen6.\nIntel UPI\nAMD xGMI\nMulti-gigabit Ethernet.\nDDR4/DDR5\nNVLINK\nSAS/SATA\n\nExperience with sideband and control buses:SPI, eSPI\nGPIO\nI2C/I3C\n\nExcellent communication and leadership skills will be needed.\nFPGA design experience with Verilog is preferred.\nExperience with recent Intel/AMD CPUs are a plus.\nExperience with recent Nvidia GPUs are a plus.\nExperience with PCIe switches and re-timers are a plus.\nPower integrity analysis experience is a plus.\nExperience with Digital or Analog Simulation is a plus.\nBSEE with 7 years’ experience or MSEE with 5 years’ experience.\n Disclaimer:Certain U.S. based or U.S. customer or client-facing roles may be required to comply with applicable requirements, such as immunization/occupational health mandates, and/or drug testing requirements.\nRange and benefit information provided in this posting are specific to the stated locations only\nUS: Hiring Range in USD from: $114,600 to $234,600 per annum. May be eligible for bonus, equity, and compensation deferral.\nOracle maintains broad salary ranges for its roles in order to account for variations in knowledge, skills, experience, market conditions and locations, as well as reflect Oracle's differing products, industries and lines of business.\nCandidates are typically placed into the range based on the preceding factors as well as internal peer equity.\nOracle US offers a comprehensive benefits package which includes the following:\n1. Medical, dental, and vision insurance, including expert medical opinion\n2. Short term disability and long term disability\n3. Life insurance and AD&D\n4. Supplemental life insurance (Employee/Spouse/Child)\n5. Health care and dependent care Flexible Spending Accounts\n6. Pre-tax commuter and parking benefits\n7. 401(k) Savings and Investment Plan with company match\n8. Paid time off: Flexible Vacation is provided to all eligible employees assigned to a salaried (non-overtime eligible) position. Accrued Vacation is provided to all other employees eligible for vacation benefits. For employees working at least 35 hours per week, the vacation accrual rate is 13 days annually for the first three years of employment and 18 days annually for subsequent years of employment. Vacation accrual is prorated for employees working between 20 and 34 hours per week. Employees working fewer than 20 hours per week are not eligible for vacation.\n9. 11 paid holidays\n10. Paid sick leave: 72 hours of paid sick leave upon date of hire. Refreshes each calendar year. Unused balance will carry over each year up to a maximum cap of 112 hours.\n11. Paid parental leave\n12. Adoption assistance\n13. Employee Stock Purchase Plan\n14. Financial planning and group legal\n15. Voluntary benefits including auto, homeowner and pet insurance\nThe role will generally accept applications for at least three calendar days from the posting date or as long as the job remains posted.\nAs part of Oracle's onboarding process and consistent with applicable law, US-based employees are required to complete identity verification, which involves the collection and processing of their biometric information. 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