{"id":4196774,"url":"https://alion.io/job/pivot-edge-fpga-engineer","title":"FPGA Engineer","company":{"id":687060,"name":"Pivot Edge","domain":"pivot-edge.app","url":"https://alion.io/company/pivot-edge","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Recruitee","truth_index":{"grade":"A","score":92,"open_postings":6,"ghost_share":0,"stale_share":0.333,"repost_share":0,"time_to_fill_p50_days":44,"computed_at":"2026-11-12T10:38:37Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Dallas, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"C","optional":true},{"name":"C++","optional":true},{"name":"CI/CD","optional":true},{"name":"Embedded C","optional":true},{"name":"Git","optional":true},{"name":"Linux","optional":true},{"name":"Xilinx Vivado","optional":true}],"status":"live","first_seen_at":"2026-11-12T19:12:31Z","employer_posted_date":"2026-11-12","last_verified_at":"2026-11-12T20:47:57Z","board_verified":true,"closed_at":null,"days_open":0,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":0},"description":"About Macnica\nMacnica Americas, Inc. is the North American division of Macnica Fuji Electronics Holdings, Inc. a $10 billion technology solutions provider with a stronghold in semiconductor distribution. Macnica excels in customizing solutions to client requirements and leveraging skilled engineers to expedite product development without compromising outcomes for our clients.\nLearn more about the Macnica team members you’ll be joining!\nJob Summary:\nThe Senior FPGA Engineer is a key member of the engineering team responsible for the design, implementation, verification, and optimization of FPGA and SoC-based solutions for high-performance networking, video, and professional media applications.\nThis is a hands-on engineering role requiring strong expertise in Verilog/SystemVerilog, FPGA architecture, simulation, timing closure, hardware debugging, and modern AI-assisted engineering workflows. The successful candidate will independently own complex FPGA designs from requirements through implementation and system integration and will work closely with software, hardware, systems, and QA engineers.\nExperience with high-speed Ethernet, packet processing, video, and media-over-IP technologies is highly desirable.\nDuties/Responsibilities:\nDesign, implement, and optimize FPGA RTL using Verilog and SystemVerilog.\n\nTranslate system and product requirements into FPGA architectures, interfaces, and detailed implementation plans.\n\nOwn FPGA features and subsystems from requirements through RTL design, verification, timing closure, hardware bring-up, and system integration.\n\nLeverage AI-assisted engineering tools where appropriate to accelerate development, verification, debugging, and documentation while maintaining engineering quality, security, and ownership of the resulting design.\n\nDesign high-throughput, low-latency datapaths for networking, video, and streaming applications.\n\nImplement and optimize Ethernet/IP packet-processing architectures, including packet parsing, buffering, clock-domain crossing, timestamping, and data movement.\n\nDevelop and maintain RTL testbenches and verification environments, including functional simulation, assertions, and coverage where appropriate.\n\nDevelop FPGA constraints, perform static timing analysis, resolve timing violations, and optimize designs for performance, resource utilization, and power.\n\nIntegrate FPGA logic with embedded processors, memories, high-speed I/O, and other system components.\n\nDevelop or modify C/C++ embedded software as required for FPGA bring-up, hardware interaction, testing, and debugging.\n\nPerform board-level FPGA bring-up and debug using tools such as embedded logic analyzers, oscilloscopes, and protocol analyzers.\n\nDiagnose complex hardware/software integration issues and drive them to resolution.\n\nParticipate in architecture, RTL, and design reviews and contribute to engineering standards and best practices.\n\nCollaborate closely with hardware, embedded software, systems, QA, and other engineering teams throughout the product development lifecycle.\n\nProvide technical guidance and mentoring to less-experienced engineers.\n\nProduce clear technical documentation covering architecture, interfaces, design decisions, constraints, and verification.\n\nRequirements\nRequired Skills/Abilities:\n5+ years of hands-on FPGA/RTL development experience with significant ownership of production FPGA designs.\n\nExperience using AI-assisted development tools to improve engineering productivity, including code generation, review, debugging, test development, documentation, and analysis. Ability to critically review and validate AI-generated code and technical output.\n\nStrong proficiency in Verilog and/or SystemVerilog.\n\nStrong understanding of synchronous digital design, clock-domain crossing, reset architectures, pipelining, and high-performance FPGA design techniques.\n\nDemonstrated experience with FPGA constraints, static timing analysis, and timing closure.\n\nStrong experience with RTL simulation and verification methodologies.\n\nExperience developing FPGA-based SoC designs and integrating FPGA logic with embedded processors.\n\nExperience with high-speed Ethernet/IP networking or packet-processing architectures.\n\nExperience debugging FPGA designs in hardware using tools such as ILA, SignalTap, oscilloscopes, or protocol analyzers.\n\nExperience with at least one major FPGA development environment, such as AMD/Xilinx Vivado or Altera/Intel Quartus.\n\nWorking knowledge of C/C++ for embedded software, FPGA bring-up, hardware validation, or system debugging.\n\nProficiency working within Linux-based engineering and development environments.\n\nExperience using Git or similar version-control systems.\n\nStrong analytical and debugging skills spanning FPGA hardware, embedded software, and system-level integration.\n\nAbility to independently take ownership of complex technical problems and drive them through resolution.\n\nPreferred Qualifications:\nExperience with Ethernet-based professional media or video-over-IP systems.\n\nKnowledge of RTP, PTP/IEEE 1588, SMPTE ST 2110, AES67, IPMX, or related media-over-IP protocols and standards.\n\nExperience designing precise hardware timestamping, synchronization, clock-recovery, or other timing-sensitive FPGA systems.\n\nExperience with FPGA-based video pipelines and video interfaces such as SDI and HDMI.\n\nExperience with AXI, Avalon, DMA, DDR memory controllers, PCIe, or similar high-speed FPGA interfaces.\n\nExperience with Pro-AV, broadcast, video, imaging, or other high-bandwidth real-time applications.\n\nExperience with FPGA build automation and CI/CD workflows.\n\nExperience taking FPGA designs from initial architecture through production deployment.\n\nExperience applying AI-assisted development workflows to FPGA/embedded engineering, including RTL and testbench development, verification, build and automation scripts, embedded C/C++, debugging, and technical documentation.\n\nEducation and Experience:\nBachelor’s or Master’s degree in Computer Science, Electrical Engineering, or related field.","description_format":"text","description_chars":6050,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Electronic Components Distribution"],"lifecycle":[{"event":"open","at":"2026-11-12T20:47:57Z"}],"visa":[],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":0,"expected_fill_days":44,"reasons":["conf:1","win:early"],"computed_at":"2026-11-12T22:42:54Z"},"pay":null,"html_url":"https://alion.io/job/pivot-edge-fpga-engineer","json_url":"https://alion.io/job/pivot-edge-fpga-engineer.json","meta":{"generated_at":"2026-11-12T22:42:54Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":48046,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-13T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":687060},"rest":"https://alion.io/mcp/rest/get_company?id=687060"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fpivot-edge-fpga-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"free","price":{"credits":0,"usd":0},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fpivot-edge-fpga-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fpivot-edge-fpga-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/pivot-edge-fpga-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fpivot-edge-fpga-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":4196774}},{"tool":"search_jobs","arguments":{"company":"pivot-edge.app","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":4196774},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}