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Salary
≈ $69k – $122k per year (Estimated)
Location
In office (Delft)
Seniority
Senior · 5+ years exp

Confirmed on the employer's own hiring board on Oct 27, 2026. First seen by Alion on Jan 13, 2026. Qblox scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Qblox is a technology company specializing in scalable control electronics and software infrastructure for quantum computers. Headquartered in Delft, Netherlands, the company designs advanced qubit control stacks and modular hardware systems engineered for low-latency operation and exceptional noise performance. By providing innovative solutions to research institutions and industry partners globally, it empowers developers to scale and optimize complex quantum architectures.

Join us at Qblox as we revolutionize the landscape of quantum computing! Our technology is used around the globe by world-class research teams.

We are seeking passionate FPGA/RTL Design Engineers to help us build a cutting-edge control stack for industrial scale quantum computers.

The stack Qblox develops is a distributed architecture that allows parallel qubit readout, control, intercommunication and other functions, ultimately interacting with the physical qubits using high frequency analog signals. Imagine what it takes to talk to 1000 qubits, with nanosecond-level synchronization and all-to-all connectivity and will understand the design and verification challenges that we face.

We foster a culture of collaboration where every voice is heard and valued. You will have the opportunity to take ownership of your projects, influence technical decisions at higher levels and gain a broad understanding of what goes into our products. You will likely be working in cross-functional teams including electrical engineers, digital design engineers, application engineers and scientists and also have a chance to learn about the Quantum field from our in-house experts.

Your role:

  • Understand/evaluate requirements, help design solutions and implement them in VHDL

  • Comfortable reading internal and vendor (FPGA, third party ASICs/software) documentation

  • Write self-checking testbenches at the module level and occasionally help expand toplevel UVM testbenches

  • You will have the opportunity to propose changes to architecture and team processes

  • Be a sparring partner to a diverse team of FPGA and embedded software engineers

  • We’re constantly trying to find better ways of doing things - be pro-active with proposing your ideas or relevant new developments from the ASIC/FPGA field

Requirements

Enough about us, what about you?

To really enjoy this role, we imagine that you will possess the following experience:

  • A driven FPGA Design engineer that has been working in a similar role and R&D environment for 5+ years.

  • Good communication

  • Working knowledge of either Xilinx Vivado or Intel FPGA Quartus

  • VHDL

  • Module-level verification

  • High-end simulator tools (e.g. Mentor Graphics QuestaSim)

  • Processor and bus-system architecture (e.g. AMBA AXI, Avalon, etc)

  • Some scripting ability (python, tcl/tk, shell)

  • Git

Optional nice-to-haves:

  • Xilinx Zynq-7000 / Ultrascale+/ RFSoC

  • (System)Verilog

  • Verification frameworks (preferably UVM, but also OVM, OSVVM, Cocotb, etc)

  • Timing closure methods

  • Linux kernel module development

  • DSP

  • C/C++

  • Microarchitecture design

  • Experience in the Quantum field

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