{"id":3258416,"url":"https://alion.io/job/qblox-fpga-design-engineer","title":"FPGA Design Engineer","company":{"id":20997,"name":"Qblox","domain":"qblox.com","url":"https://alion.io/company/qblox","size_band":"51-200","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Recruitee","truth_index":{"grade":"B","score":75,"open_postings":8,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-10-27T05:46:45Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Delft, Netherlands"],"countries":["NL"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":69000,"max_usd":122000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":23},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Git","optional":false},{"name":"Python","optional":false},{"name":"Siemens QuestaSim","optional":false},{"name":"UVM","optional":false},{"name":"VHDL","optional":false},{"name":"Xilinx Vivado","optional":false},{"name":"C++","optional":true},{"name":"Cocotb","optional":true},{"name":"Linux","optional":true},{"name":"OSVVM","optional":true},{"name":"Verilog","optional":true}],"status":"live","first_seen_at":"2026-01-13T13:13:18Z","employer_posted_date":"2026-01-13","last_verified_at":"2026-10-27T20:29:11Z","board_verified":true,"closed_at":null,"days_open":287,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":286},"description":"Join us at Qblox as we revolutionize the landscape of quantum computing! Our technology is used around the globe by world-class research teams.\nWe are seeking passionate FPGA/RTL Design Engineers to help us build a cutting-edge control stack for industrial scale quantum computers.\nThe stack Qblox develops is a distributed architecture that allows parallel qubit readout, control, intercommunication and other functions, ultimately interacting with the physical qubits using high frequency analog signals. Imagine what it takes to talk to 1000 qubits, with nanosecond-level synchronization and all-to-all connectivity and will understand the design and verification challenges that we face.\nWe foster a culture of collaboration where every voice is heard and valued. You will have the opportunity to take ownership of your projects, influence technical decisions at higher levels and gain a broad understanding of what goes into our products. You will likely be working in cross-functional teams including electrical engineers, digital design engineers, application engineers and scientists and also have a chance to learn about the Quantum field from our in-house experts.\nYour role:\nUnderstand/evaluate requirements, help design solutions and implement them in VHDL\n\nComfortable reading internal and vendor (FPGA, third party ASICs/software) documentation\n\nWrite self-checking testbenches at the module level and occasionally help expand toplevel UVM testbenches\n\nYou will have the opportunity to propose changes to architecture and team processes\n\nBe a sparring partner to a diverse team of FPGA and embedded software engineers\n\nWe’re constantly trying to find better ways of doing things - be pro-active with proposing your ideas or relevant new developments from the ASIC/FPGA field\n\nRequirements\nEnough about us, what about you?\nTo really enjoy this role, we imagine that you will possess the following experience:\nA driven FPGA Design engineer that has been working in a similar role and R&D environment for 5+ years.\n\nGood communication\n\nWorking knowledge of either Xilinx Vivado or Intel FPGA Quartus\n\nVHDL\n\nModule-level verification\n\nHigh-end simulator tools (e.g. Mentor Graphics QuestaSim)\n\nProcessor and bus-system architecture (e.g. AMBA AXI, Avalon, etc)\n\nSome scripting ability (python, tcl/tk, shell)\n\nGit\n\nOptional nice-to-haves:\nXilinx Zynq-7000 / Ultrascale+/ RFSoC\n\n(System)Verilog\n\nVerification frameworks (preferably UVM, but also OVM, OSVVM, Cocotb, etc)\n\nTiming closure methods\n\nLinux kernel module development\n\nDSP\n\nC/C++\n\nMicroarchitecture design\n\nExperience in the Quantum field","description_format":"text","description_chars":2607,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Hardware","Science & Engineering","Quantum Science & Computing","Quantum Computing Hardware"],"lifecycle":[{"event":"open","at":"2026-10-26T03:13:06Z"}],"visa":[],"liveness":{"score":8,"band":"cold","label":"Long shot","p_open":1,"p_active":0.273,"p_room":0.28,"age_days":286,"expected_fill_days":36,"reasons":["conf:3","win:tail","crowd:"],"computed_at":"2026-10-27T05:46:45Z"},"pay":null,"html_url":"https://alion.io/job/qblox-fpga-design-engineer","json_url":"https://alion.io/job/qblox-fpga-design-engineer.json","meta":{"generated_at":"2026-10-27T22:58:13Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":14829,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-28T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":20997},"rest":"https://alion.io/mcp/rest/get_company?id=20997"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fqblox-fpga-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fqblox-fpga-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fqblox-fpga-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/qblox-fpga-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fqblox-fpga-design-engineer"}]}