{"id":3173554,"url":"https://alion.io/job/qualcomm-asic-design-verification-engineer-security-group-sr-staff","title":"ASIC Design Verification Engineer (Security Group) - Sr Staff","company":{"id":94,"name":"Qualcomm","domain":"qualcomm.com","url":"https://alion.io/company/qualcomm","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Eightfold","truth_index":{"grade":"B","score":70,"open_postings":1113,"ghost_share":0.244,"stale_share":0.138,"repost_share":0.459,"time_to_fill_p50_days":74,"computed_at":"2026-10-27T05:46:45Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":190200,"max":285400,"currency":"USD","period":"year","gross":null,"usd_annual":285400},"salary_estimate":null,"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Synopsys VCS","optional":false},{"name":"Synopsys Verdi","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Unix","optional":false},{"name":"UVM","optional":false},{"name":"Assembly","optional":true},{"name":"Rest-Assured","optional":true}],"status":"live","first_seen_at":"2026-10-21T00:00:00Z","employer_posted_date":"2026-10-23","last_verified_at":"2026-10-27T10:00:00Z","board_verified":true,"closed_at":null,"days_open":6,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":6},"description":"Company:\nQualcomm Technologies, Inc.Job Area:\nEngineering Group, Engineering Group > ASICS EngineeringGeneral Summary:\nAs a leading technology innovator, Qualcomm pushes the boundaries to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.\nQualifications:\nMinimum Experience Level should be 10+ years in SOC-level verification with good understanding of debugging either ARM-based or RISC-V based processors, good understanding of APB/AHB/AXI protocols. Must have solid understanding of SV/UVM concepts. Prior experience in any cryptographic algorithm is preferred. Must have basic understand on UNIX commands and Python/Perl scripting.\nRequired Skills:\nSystemVerilog\nUVM\nSynopsys VCS/Verdi\nMakefile automation\nPython scripting\nAssertion-based verification\nFunctional coverage\nAs a Design Verification Engineer, you will work with Chip Architects to validate the concepts of core and sub-system level micro-architectures. You will work on a selected part of the subsystem Design Verification to ensure that it functions to the standards of being launch ready for the end Product.\nRole and Responsibilities\nWork with subsystem and SOC Architects to understand the concepts and high-level system requirements.\nDevelop detailed Test and Coverage plans based on the Architecture and Micro-architecture.\nDevelop Verification Methodology, ensuring scalability and portability across environments.\nDevelop Verification environment, including all the respective components such as Stimulus, Checkers, Monitors Assertions, and Coverpoints.\nDevelop Verification Plans and Testbenches for your functional domain. \nExecute Verification Plans, including Design Bring-up, DV environment Bring-up, Regressions enabling all features under your care, and Debug of the test failures.\nTrack and report DV progress using a variety of metrics, including Bugs and Coverage.\nPreferred Qualifications\nDeep knowledge of APB/AXI/SPI protocols, handshake mechanisms, cross-clock domains and clock gating.\nSolid understand of memory organization, fault-tolerant design, parity schemes, error detection and error correction schemes.\nAdvance techniques such as: Formal, Assertions, and Silicon bring-up, is helpful.\nIn-depth knowledge of Micro-processor functions, Network-on-Chip Architectures, and Micro-architectures.\nExperience in writing Test plans, portable Testbenches, Transactors, and Assembly code.\nExperience with different Verification Methodologies and Tools such as Simulators, Coverage collection, Gate-level Simulation, Waveform viewers, and Mixed signal Verification.\nAbility to develop and work independently on a Block/Unit of the design.\nPrincipal Duties and Responsibilities:\nLeverage advanced knowledge of computer architecture, micro-architecture, logic design, circuits, and/or physical design to develop and verify critical high performance and secure designs\nAnticipate, identify, and solve highly-complex problems to ensure design completeness, functionality, power, and performance. \nCollaborate with cross-functional teams to define requirements, specifications, and trade-offs (e.g., performance, power, cost, functionalities, etc.) in order to accomplish product goals.\nEvaluates all aspects of the design process from conceptualization to productization (i.e., architecture definition, feasibility, pre-silicon design and verification, and post-silicon validation) that meet customer and industry standards. \nWrites detailed technical documentation (e.g., feature descriptions, architectural descriptions, verification test plans, and implementation details, etc.) for highly complex secure subsystem designs; reviews documentation of junior engineers.\nPropose meetings and technical discussions to review Test Plans, debug issues and incorporate feedback into existing documentation and Test Plans.\nRun and Analyze Coverage reports, understand Coverage holes and re-spin Test Plans to achieve coverage metrics.\nLevel of Responsibility:\nWork independently with minimal supervision.\nProvide supervision/guidance to other team members.\nDecision-making is significant in nature and affects work beyond immediate work group.\nRequire verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc. \nHas a moderate amount of influence over key organizational decisions.\nTasks do not have pre-defined steps; planning, problem-solving, and prioritization must occur to complete the tasks effectively.\nMinimum Qualifications:\n• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.OR\nMaster's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.\nOR\nPhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.\nQualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail  or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).\nTo all Staffing and Recruiting Agencies:Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.\nEEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.\nQualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.\nPay rangeand Other Compensation & Benefits :\n$190,200.00 - $285,400.00The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.\nIf you would like more information about this role, please contact Qualcomm Careers.","description_format":"text","description_chars":8239,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Consumer Electronics","Smartphones","Headphones & Audio","Edge AI"],"lifecycle":[{"event":"open","at":"2026-10-23T19:16:05Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 55 · green card filings: 6","filings_12m":55,"filings_prev_12m":87,"green_card_filings_12m":6,"median_offered_wage_usd":122008,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":0}],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":1,"age_days":6,"expected_fill_days":74,"reasons":["conf:0","velocity","win:early","comp:brand"],"computed_at":"2026-10-27T05:46:45Z"},"pay":{"stated_usd_annual":285400,"is_top_pay":true},"html_url":"https://alion.io/job/qualcomm-asic-design-verification-engineer-security-group-sr-staff","json_url":"https://alion.io/job/qualcomm-asic-design-verification-engineer-security-group-sr-staff.json","meta":{"generated_at":"2026-10-27T13:20:39Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":1416,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-28T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":94},"rest":"https://alion.io/mcp/rest/get_company?id=94"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fqualcomm-asic-design-verification-engineer-security-group-sr-staff"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fqualcomm-asic-design-verification-engineer-security-group-sr-staff"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fqualcomm-asic-design-verification-engineer-security-group-sr-staff"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/qualcomm-asic-design-verification-engineer-security-group-sr-staff\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fqualcomm-asic-design-verification-engineer-security-group-sr-staff"}]}