{"id":47553,"url":"https://alion.io/job/qualcomm-cpu-server-physical-design-timing-engineer","title":"CPU Server Physical Design Timing Engineer","company":{"id":94,"name":"Qualcomm","domain":"qualcomm.com","url":"https://alion.io/company/qualcomm","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Eightfold","truth_index":{"grade":"B","score":73,"open_postings":1253,"ghost_share":0.211,"stale_share":0.106,"repost_share":0.472,"time_to_fill_p50_days":74,"computed_at":"2026-10-12T06:55:09Z"}},"role":"DevOps","role_family":"DevOps","seniority":"middle","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":175600,"max":263400,"currency":"USD","period":"year","gross":null,"usd_annual":263400},"salary_estimate":null,"experience_years_min":4,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Rest-Assured","optional":false},{"name":"Synopsys PrimeTime","optional":false}],"status":"live","first_seen_at":"2026-07-22T00:00:00Z","employer_posted_date":"2026-09-22","last_verified_at":"2026-10-12T05:27:45Z","board_verified":true,"closed_at":null,"days_open":82,"trust":{"level":"ok","repost_count":2,"flags":["repost"],"days_open":82},"description":"Company:\nQualcomm Technologies, Inc.Job Area:\nEngineering Group, Engineering Group > CPU EngineeringGeneral Summary:\nNUVIA is now part of Qualcomm. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability.\nAbout The Role:\nIn this role you will have the opportunity to define, develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer, you will work with microarchitecture and RTL design team to develop timing constraints, drive implementation of the designs to meet aggressive power, area and performance goals using industry standard tools/flows. One of your primary responsibilities will lie in coding scripts used with STA native tools and also useful in enabling CPU timing infrastructure and methodology impacting multiple CPU projects in Qualcomm. You will have the opportunity to collaborate with Qualcomm central timing technology & methodology team and also interact with CPU implementation team to drive PPA goals of CPU. You will have the opportunity to carve out a strong professional growth path working on industry leading technology nodes N2/N3.\nKey Responsibilities:\nSTA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs of Oryon CPU Cores.\n\nTiming analysis, validation and debug across multiple PVT conditions using PT/Tempus.\n\nRun Primetime and/or Tempus for STA flow optimization and Spice to STA correlation.\n\nFind out the root cause of timing miscorrelation at different design levels in functional and test mode, propose solutions.\n\nEvaluate multiple timing methodologies/tools on different designs and technology nodes.\n\nWork on automation scripts within STA/PD tools for methodology development.\n\nGood Technical writing and Communication skills, should be willing to work in cross-collaborative environment\n\nStrong experience in design automation using TCL/Perl/Python.\n\nFamiliar with digital flow design implementation RTL to GDS : ICC, Innovous , PT/Tempus\n\n Minimum Qualifications:\n• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.OR\nMaster's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.\nOR\nPhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.\nPreferred Qualification/Skills\nStrong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling\n\nHands-on experience with STA tools - Prime-time, Tempus\n\nHave experience in driving timing convergence at Chip-level and Hard-Macro level\n\nIn-depth knowledge cross-talk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling,\n\nKnowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus)\n\nExpert in scripting languages - TCL, Perl, Python\n\nBasic knowledge of device physics\n\nQualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail  or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).\nTo all Staffing and Recruiting Agencies:Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.\nEEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.\nQualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.\nPay rangeand Other Compensation & Benefits :\n$175,600.00 - $263,400.00The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.\nIf you would like more information about this role, please contact Qualcomm Careers.","description_format":"text","description_chars":6365,"description_truncated":false,"requirements":{"experience_years_min":4,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Artificial Intelligence","Autonomous Driving","Energy Efficiency","Car Electronics"],"lifecycle":[{"event":"open","at":"2026-07-22T00:00:00Z"},{"event":"close","at":"2026-08-09T14:49:34Z"},{"event":"reopen","at":"2026-09-11T12:35:39Z"},{"event":"close","at":"2026-09-11T19:54:38Z"},{"event":"reopen","at":"2026-09-12T19:53:34Z"},{"event":"close","at":"2026-09-12T22:53:34Z"},{"event":"reopen","at":"2026-09-14T09:46:52Z"},{"event":"close","at":"2026-10-02T21:23:27Z"},{"event":"reopen","at":"2026-10-03T12:24:10Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 55 · green card filings: 6","filings_12m":55,"filings_prev_12m":87,"green_card_filings_12m":6,"median_offered_wage_usd":122008,"route":null,"cap_exempt":false,"checked_at":"2026-10-03T21:08:04+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":18}],"liveness":{"score":23,"band":"cold","label":"Long shot","p_open":1,"p_active":0.534,"p_room":0.44,"age_days":82,"expected_fill_days":74,"reasons":["conf:1","repost:2","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-12T06:55:09Z"},"pay":{"stated_usd_annual":263400,"is_top_pay":true},"html_url":"https://alion.io/job/qualcomm-cpu-server-physical-design-timing-engineer","json_url":"https://alion.io/job/qualcomm-cpu-server-physical-design-timing-engineer.json","meta":{"generated_at":"2026-10-12T11:01:31Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":17008,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-13T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":94},"rest":"https://alion.io/mcp/rest/get_company?id=94"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fqualcomm-cpu-server-physical-design-timing-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fqualcomm-cpu-server-physical-design-timing-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fqualcomm-cpu-server-physical-design-timing-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/qualcomm-cpu-server-physical-design-timing-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fqualcomm-cpu-server-physical-design-timing-engineer"}]}