{"id":4012071,"url":"https://alion.io/job/qualcomm-noc-dv-sr-engineer-2","title":"NOC DV Sr Engineer","company":{"id":4454000,"name":"Qualcomm","domain":"qualcomm.co.in","url":"https://alion.io/company/qualcomm-4","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":null,"truth_index":null},"role":"Networking","role_family":"Networking","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":2,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Formal Verification","optional":false},{"name":"Synopsys Certitude","optional":false},{"name":"Synopsys VC Formal","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"C++","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"SystemC","optional":true}],"status":"live","first_seen_at":"2026-11-10T10:36:00Z","employer_posted_date":null,"last_verified_at":"2026-11-10T10:36:00Z","board_verified":false,"closed_at":null,"days_open":0,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":0},"description":"As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, digital/analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.\n\nMinimum Qualifications:\nBachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.\nOR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.\nOR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.\n\nLooking for an experienced Verification Architect/Engineer, who will be responsible for verification of next generation Infrastructure IPs (DDRSS, Memory Controllers etc.) which goes into System-on-Chip (SoC) for smartphones, tablets and other product categories. In this position you will be expected to plan and implement IP/Cluster/Formal verification flows for the Infra IPs. Also expected to coordinate with different Design and SoC teams throughout the IP development cycle.\n\nJob responsibilities include:\nOwnership of DV test bench and other associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage)\nDevelop test plan and test cases to cover design feature set, follow up with stakeholders on code coverage, functional coverage closure at different levels of test bench\nWork closely with System Architects, Design, emulation teams on failure debugs, code/functional coverage closure\nDebug regression signatures and identify bug fixes\nResponsible for quality sign off and required documentation\nDeveloping/deploying scripts/tools for validation (Certitude, VC Formal, VPlan)\nDebug and root cause post silicon issues in collaboration with Design, SW and test teams\nWork with SoC level performance modeling team on latency, bandwidth analysis\n\nRequired skillset include:\nStrong debugging, analytical and problem-solving skills\nExpertise on UVM based verification\nKnowledgeable about ARM bus protocols, virtual memory concepts, SoC system architecture\nExperience in developing Monitors, Scoreboards, Sequencers that utilize scripts, SystemVerilog, UVM, and methodologies to increase the rate with which bugs are found and resolved\nCommunication and collaboration skills to work with a large world-wide design organization\n\nDesired skillset includes:\nExperience in designs optimized for low power - dynamic clock gating, logic/memory power collapse\nExperience in verifying designs meeting Automotive Safety Integrity Levels (ASIL)\nProficiency in scripting languages (Python or Perl) for automation initiatives, C/C++/SystemC for performance models\nPost-silicon bring-up and HW-SW debug experience would be a plus. Knowledge and exposure to silicon debug tool chains would be an added advantage\n\nQualification:\nBachelor/Master's Degree in Electronics and Communication / Micro Electronics\n3+ years of experience in IP verification or related\nExperience with UVM and ARM bus protocols\nSkills\nSystemVerilog, UVM, Verification","description_format":"text","description_chars":3336,"description_truncated":false,"requirements":{"experience_years_min":2,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","RF & Wireless Hardware","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-11-10T10:36:00Z"}],"visa":[],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":0,"expected_fill_days":29,"reasons":["seen:0","win:early"],"computed_at":"2026-11-10T16:32:47Z"},"pay":null,"html_url":"https://alion.io/job/qualcomm-noc-dv-sr-engineer-2","json_url":"https://alion.io/job/qualcomm-noc-dv-sr-engineer-2.json","meta":{"generated_at":"2026-11-10T16:32:47Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":4086,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-11T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":4454000},"rest":"https://alion.io/mcp/rest/get_company?id=4454000"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fqualcomm-noc-dv-sr-engineer-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fqualcomm-noc-dv-sr-engineer-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fqualcomm-noc-dv-sr-engineer-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/qualcomm-noc-dv-sr-engineer-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fqualcomm-noc-dv-sr-engineer-2"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":4012071}},{"tool":"search_jobs","arguments":{"company":"qualcomm.co.in","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":4012071},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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