SoC Physical Design Engineer
Confirmed on the employer's own hiring board on Oct 15, 2026. First seen by Alion on Sep 25, 2026. Qualcomm scores B on the Alion truth index.
Company:
Qualcomm India Private LimitedJob Area:
Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/opticalsystems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.
Minimum Qualifications:
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
Job Description :
Bachelor's degree in Electrical Engineering with 8 to 15 years of experience in physical design.
Experience managing complex Subsystem and Small team.
Experience in synthesis, PnR, sign-off convergence, including Static Timing Analysis (STA) and sign-off optimizations.
Job Requirement:
Experience with demanding PPA requirement of complex sub-systeM/SOC, place and route, IP integration.
Experience in low power design Implementation including UPF, multi-voltage domains, power gating.
Experience with ASIC design flows and methodology of Physical design.
Understanding of circuit design, device physics and deep sub-micron technology. Should have worked on multiple TO in advance technology nodes.
Person should also have good understanding of automation to drive the efforts to improve the PPA
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