{"id":2982671,"url":"https://alion.io/job/qualcomm-staff-engineer-physical-design","title":"Staff Engineer - Physical Design","company":{"id":4454000,"name":"Qualcomm","domain":"qualcomm.co.in","url":"https://alion.io/company/qualcomm-4","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":null,"truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Chennai, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":25000,"max_usd":52000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":601},"experience_years_min":9,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Innovus","optional":false},{"name":"Linux","optional":false},{"name":"Perl","optional":false},{"name":"Unix","optional":false}],"status":"live","first_seen_at":"2026-10-21T07:35:00Z","employer_posted_date":null,"last_verified_at":"2026-10-21T07:35:00Z","board_verified":false,"closed_at":null,"days_open":1,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":1},"description":"Requirements: \nPhysical Implementation activities for subsystems, which include floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization.\nShould have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions.\nStrong expertise in timing convergence of high frequency data-path intensive Cores and advanced STA concepts.\nWell versed with the Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes\nGood understanding of clocking architecture.\nShould be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc.\nWell versed with Tcl/Perl Scripting.\nExperience of working as part of a larger team and working towards project milestones and deadlines.\nHandle technical deliverables with a small team of engineers.\nStrong problem-solving skills and good communication skills.\n\nMinimum Qualifications: \nBachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.\nMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.\nPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.\nThe 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