{"id":698239,"url":"https://alion.io/job/qualcomm-welcome-new-gradspackagesystem-design-solutions-engineer-engineer-sr-engineer","title":"【Welcome New Grads】Package/System Design Solutions Engineer - Engineer / Sr. Engineer","company":{"id":94,"name":"Qualcomm","domain":"qualcomm.com","url":"https://alion.io/company/qualcomm","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Eightfold","truth_index":{"grade":"B","score":72,"open_postings":1182,"ghost_share":0.22,"stale_share":0.121,"repost_share":0.468,"time_to_fill_p50_days":75,"computed_at":"2026-10-17T05:46:00Z"}},"role":"Solutions","role_family":"Solutions","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hsinchu, Taiwan"],"countries":["TW"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":26000,"max_usd":59000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1651},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Rest-Assured","optional":true}],"status":"live","first_seen_at":"2026-06-29T00:00:00Z","employer_posted_date":"2026-07-26","last_verified_at":"2026-10-19T02:38:25Z","board_verified":true,"closed_at":null,"days_open":112,"trust":{"level":"ok","repost_count":2,"flags":["repost"],"days_open":111},"description":"Company:\nQualcomm Semiconductor LimitedJob Area:\nEngineering Group, Engineering Group > Packaging Engineering General Summary:\nThe IC Package System Design Team at Qualcomm has an opening for Package/System Design Engineer. This team is responsible for road mapping, architecting, design methodology, design implementation and verification for all Qualcomm package products (Digital, RF, Analog, PMIC, etc...).\nJob responsibilities for this position include package selection, package design, and package electrical modeling. This involves optimizing system co-design of IC-PKG-PCB die with keeping in mind package footprint/height constraints, IC floor-planning, PCB, signal integrity, power distribution network, and thermal constraints.\nAdditional responsibilities:\nIC top level floorplanning including hard macro block placement, padring, RDL and bump pattern/assignment\n\nSystem level co-design methodology of IC, Package and PCB/Board\n\nConcept analysis for new product package selection based on requirements for mechanical, thermal and electrical performance with the goal to achieve lowest system level cost\n\nPackage design flow methodology implementing high speed interface SI constraints for impedance, IR drop, cross-talk.\n\nPackage design flow methodology implementing power distribution network (PDN) constraints for high frequency processor cores (1GHz+) including design optimization techniques at the die/pkg/PCB levels\n\nWorking with marketing/IC/product teams on competitive analysis and road mapping package technology for future products\n\nMinimum Qualifications\nBachelor's degree in Engineering, Information Systems, Computer Science, or related field.\n\n3+ years Hardware Engineering experience or related work experience.\n\nPreferred Qualifications\nExperience in IC package and/or PCB selection, design, and layout experience - Experience in Pinmap optimization of optimal PCB design\n\nStrong knowledge in 3D/2D EM simulation tool, electromagnetic theory and transmission line theory\n\nWorking knowledge of die floor planning, IO placement, and bump placement\n\nWorking knowledge of Chip, Package and PCB co-design methodology\n\nFamiliar with assembly and substrate manufacturing process\n\nFamiliar with trade-offs among package cost, technologies, design, performance, power, and thermal requirements.\n\nFamiliar with PCB stack-up and breakout strategy\n\nEducational Requirements\nBachelor's Electrical Engineering and/or Mechanical Engineering\n\nPreferred: Master's, Electrical Engineering\n\nMinimum Qualifications:\n• Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 2+ years of System/Package Design/Technology Engineering or related work experience.OR\nMaster's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 1+ year of System/Package Design/Technology Engineering or related work experience.\nOR\nPhD in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field.\nApplicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail  or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).\nQualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.\nTo all Staffing and Recruiting Agencies:Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.\nIf you would like more information about this role, please contact Qualcomm Careers.","description_format":"text","description_chars":4810,"description_truncated":false,"requirements":{"experience_years_min":3,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":true},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","RF & Wireless Hardware","Car Electronics"],"lifecycle":[{"event":"open","at":"2026-09-11T02:22:19Z"},{"event":"close","at":"2026-09-11T05:42:15Z"},{"event":"reopen","at":"2026-09-11T23:28:00Z"},{"event":"close","at":"2026-09-12T02:28:18Z"},{"event":"reopen","at":"2026-09-13T14:50:35Z"},{"event":"close","at":"2026-09-13T17:50:41Z"},{"event":"reopen","at":"2026-09-15T03:57:42Z"}],"visa":[],"liveness":{"score":22,"band":"cold","label":"Long shot","p_open":1,"p_active":0.499,"p_room":0.44,"age_days":110,"expected_fill_days":75,"reasons":["conf:1","repost:2","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-17T05:46:00Z"},"pay":null,"html_url":"https://alion.io/job/qualcomm-welcome-new-gradspackagesystem-design-solutions-engineer-engineer-sr-engineer","json_url":"https://alion.io/job/qualcomm-welcome-new-gradspackagesystem-design-solutions-engineer-engineer-sr-engineer.json","meta":{"generated_at":"2026-10-19T04:22:44Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":2587,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-20T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":94},"rest":"https://alion.io/mcp/rest/get_company?id=94"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fqualcomm-welcome-new-gradspackagesystem-design-solutions-engineer-engineer-sr-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fqualcomm-welcome-new-gradspackagesystem-design-solutions-engineer-engineer-sr-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fqualcomm-welcome-new-gradspackagesystem-design-solutions-engineer-engineer-sr-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/qualcomm-welcome-new-gradspackagesystem-design-solutions-engineer-engineer-sr-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fqualcomm-welcome-new-gradspackagesystem-design-solutions-engineer-engineer-sr-engineer"}]}