{"id":1272442,"url":"https://alion.io/job/quickhire-design-verification-engineer","title":"Design Verification Engineer","company":{"id":3800659,"name":"QuickHire","domain":"quick-hire.com","url":"https://alion.io/company/quickhire-2","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":null,"truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India","Noida, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":35000,"max_usd":76000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":978},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Formal Verification","optional":false},{"name":"SAS","optional":false},{"name":"UVM","optional":false}],"status":"live","first_seen_at":"2026-09-02T07:37:54Z","employer_posted_date":null,"last_verified_at":"2026-09-02T07:37:54Z","board_verified":false,"closed_at":null,"days_open":25,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":25},"description":"Position : Design Verification role for IP development team.\n\nExperience : B. Tech/M.Tech with 8+ years of relevant experience.\n\nLocation :\n\nPosition is based in Bangalore/Noida, part of Cadence IP Group - Preferred location is Bangalore.\n\nJob Description :\n\nResponsibilities :\n\n- Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C).\n\n- UVM testbench development to build a robust, scalable and efficient testbench to verify the design IPs.\n\n- In addition to UVM functional verification, role could involve Formal verification of complex design modules.\n\n- In addition to UVM functional verification, role could involve participating in Emulation qualification of design IPs.\n\n- Architect and implement robust UVM-based testbenches from scratch to verify complex PCIe controller features, ensuring full compliance with industry specifications.\n\n- Drive the development of constrained-random verification environments to identify corner-case bugs, thereby reducing the risk of silicon re-spins.\n\n- Collaborate with RTL designers to debug complex protocol-level issues, ensuring rapid resolution and adherence to aggressive project timelines.\n\n- Understand design and produce detailed verification strategy and test plan.\n\n- Self-starter and learner with passion for getting the job done on time with great quality.\n\n- Strong problem solving, analytical and debug skills.\n\n- Excellent verbal and written communications skills.\n\n- Clearly communicate project status, issues etc.\n\nBehavioral Skills :\n\n- Must possess strong written, verbal and presentation skills.\n\n- Good communication and interpersonal skills, demonstrate teamwork and collaboration skills.\n\n- Ability to establish a close working relationship with both customer peers and management.\n\n- Explore whats possible to get the job done, including creative use of unconventional solutions.\n\n- Work effectively across functions and geographies.\n\n- Push to raise the bar while always operating with integrity.\n\nSkills\nPCI-e, Design Verification, IP Verification, USB, Ethernet Port, HDMI, UVM","description_format":"text","description_chars":2134,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Professional Services","Recruiting & Staffing"],"lifecycle":[{"event":"open","at":"2026-09-26T00:07:01Z"}],"liveness":{"score":31,"band":"fade","label":"Fading","p_open":0.85,"p_active":0.657,"p_room":0.55,"age_days":24,"expected_fill_days":24,"reasons":["seen:24","velocity","win:tail"],"computed_at":"2026-09-27T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/quickhire-design-verification-engineer","json_url":"https://alion.io/job/quickhire-design-verification-engineer.json","meta":{"generated_at":"2026-09-28T00:45:51Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":306,"day_limit":5000,"remaining_today":4694,"minute_limit":60,"resets_at":"2026-09-29T00:00:00Z"}}}