{"id":2163889,"url":"https://alion.io/job/realtek-semiconductor-design-for-test-engineer","title":"Design-for-Test Engineer","company":{"id":62209,"name":"Realtek Semiconductor","domain":"realtek.com","url":"https://alion.io/company/realtek-semiconductor","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":null,"truth_index":null},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"junior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Singapore"],"countries":["SG"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":5000,"max":8000,"currency":"SGD","period":"month","gross":true,"usd_annual":74916},"salary_estimate":null,"experience_years_min":1,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false}],"status":"live","first_seen_at":"2026-10-09T00:00:00Z","employer_posted_date":null,"last_verified_at":"2026-10-09T00:00:00Z","board_verified":false,"closed_at":null,"days_open":7,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":7},"description":"We are currently seeking a skilled Design-For-Test (DFT) Engineer to join our team at Realtek Singapore. As a DFT Engineer, you will be responsible for providing design for test support to internal RD groups across a wide range of application.\nJOB DESCRIPTION\nCollaborate closely with IC Design teams at Realtek.\nEngage with design team to discuss and extend specifications, particularly with respect to test insertion and test pattern generation.\nDevelop test plans and implement design-for-test structures (At-speed test, MBIST,test compression, boundary scan), with a strong background in hierarchical DFT flow.\nCreate or modify scan constraints.\nGenerate ATPG vectors for various fault models and scan fsdb for IR analysis.\nPerform functional and ATPG pre- and post-layout simulations.\nImprove the internal scripting environment based on acquired knowledge.\nJOB REQUIREMENTS\nBachelor's or Master's degree in Electrical Engineering or a related field.\nKnowledge or project experience in DFT and ASIC synthesis, with a focus on designfor-test structures.\nFamiliarity with industry-standard EDA tools, such as Synopsys, Cadence, or Mentor Graphics.\nFamiliarity with scripting languages, such as TCL or Perl.\nExcellent verbal and written communication skills, with the ability to clearly convey technical concepts.\nFresh graduates are welcome to apply.\nSkills\nPerl, Graduate Recruitment, Writing Technical Specifications, Content Creation, Mentor Graphics, liaison with design teams, synthesis design, Mechanical Simulations, Fault Analysis, Script Development, Cadence, Scripting Languages, DFT, Electronic design automation (EDA), Technical Description, Electrical Engineering","description_format":"text","description_chars":1678,"description_truncated":false,"requirements":{"experience_years_min":1,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips"],"lifecycle":[{"event":"open","at":"2026-10-09T08:32:15Z"}],"visa":[],"liveness":{"score":87,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.872,"p_room":1,"age_days":7,"expected_fill_days":30,"reasons":["seen:7","velocity","win:early","comp:junior"],"computed_at":"2026-10-16T05:45:00Z"},"pay":{"stated_usd_annual":74916,"is_top_pay":false},"html_url":"https://alion.io/job/realtek-semiconductor-design-for-test-engineer","json_url":"https://alion.io/job/realtek-semiconductor-design-for-test-engineer.json","meta":{"generated_at":"2026-10-16T17:09:38Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":1810,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-17T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":62209},"rest":"https://alion.io/mcp/rest/get_company?id=62209"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Frealtek-semiconductor-design-for-test-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Frealtek-semiconductor-design-for-test-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Frealtek-semiconductor-design-for-test-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/realtek-semiconductor-design-for-test-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Frealtek-semiconductor-design-for-test-engineer"}]}