{"id":1211945,"url":"https://alion.io/job/rebellions-ip-design-engineer","title":"IP Design Engineer","company":{"id":173,"name":"Rebellions","domain":"rebellions.ai","url":"https://alion.io/company/rebellions","size_band":"501-1000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greeting","truth_index":{"grade":"C","score":67,"open_postings":38,"ghost_share":0.553,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":55,"computed_at":"2026-10-17T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Seongnam, South Korea"],"countries":["KR"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":65000,"max_usd":152000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":723},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Xcelium","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-01-28T13:12:04Z","employer_posted_date":"2026-09-25","last_verified_at":"2026-10-18T06:36:23Z","board_verified":true,"closed_at":null,"days_open":262,"trust":{"level":"ghost","repost_count":0,"flags":["stale","company_stale"],"days_open":262},"description":"About the Job\nAs an IP Design Engineer, you will be responsible for the architecture and RTL implementation of AI acceleration IPs and core SoC components. This role involves close collaboration with cross-functional teams to bridge the gap between complex algorithms and hardware execution. You will contribute to the entire silicon lifecycle, from initial design to successful bring-up and debugging.\nResponsibilities and Opportunities\nIP Architecture & Design: architectural definition and RTL design for AI acceleration IPs and essential SoC components\nCross-Functional Collaboration: Partner with verification, SoC integration, and software teams to ensure seamless IP functionality within the system\nDSP Implementation: Communicate and collaborate with DSP engineers to optimize hardware implementation of specialized algorithms\nSilicon Bring-up: Participate in silicon bring-up and hardware debugging to validate IP performance in real-world silicon\nKey Qualifications\n3+ years of experience in RTL design using SystemVerilog or Verilog\nFull Design Lifecycle: Proven experience spanning from initial architecture definition to final RTL implementation\nSimulation & Debugging: Proficiency in logic simulation tools (VCS, Xcelium) with the ability to resolve complex RTL issues\nQuality Toolchain: experience with industry-standard quality flows, including Lint, CDC, DFT, and Synthesis\nIdeal Qualifications\nArithmetic & Buffer Design: Experience in designing specialized Arithmetic (Floating-Point) units and optimized buffer structures\nMemory Management: Deep understanding of MMU architectures and experience utilizing ARM MMU in IP design\nInterconnect Protocols: Strong understanding of AMBA-BUS and various high-performance interconnect protocols\nPower Analysis: Experience in estimating and optimizing power consumption at the RTL level\n전형절차\n서류전형 > On-line 인터뷰 > On-site 인터뷰 > Culture-fit 인터뷰 > 처우 협의 > 최종 합격\n전형절차는 직무별로 다르게 운영될 수 있으며, 일정 및 상황에 따라 변동될 수 있습니다.\n전형 일정 및 결과는 지원 시 작성하신 이메일로 개별 안내드립니다.\n참고사항\n본 공고는 모집 완료 시 조기 마감될 수 있습니다.\n지원서 내용 중 허위사실이 있는 경우에는 합격이 취소될 수 있습니다.\n채용 및 업무 수행과 관련하여 요구되는 법령 상 자격이 갖추어지지 않은 경우 채용이 제한될 수 있습니다.\n보훈 대상자 및 장애인 여부는 채용 과정에서 어떠한 불이익도 미치지 않습니다.\n담당 업무 범위는 후보자의 전반적인 경력과 경험 등 제반사정을 고려하여 변경될 수 있습니다. 이러한 변경이 필요할 경우, 최종 합격 통지 전 적절한 시기에 후보자와 커뮤니케이션 될 예정입니다.\n채용 관련 문의사항은 아래 메일 주소로 문의바랍니다. \n ","description_format":"text","description_chars":2344,"description_truncated":false,"requirements":{"experience_years_min":3,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","AI Compute & Inference","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-09-25T04:44:08Z"}],"visa":[],"liveness":{"score":6,"band":"cold","label":"Long shot","p_open":1,"p_active":0.22,"p_room":0.28,"age_days":261,"expected_fill_days":55,"reasons":["conf:2","stale_co","ghost","win:tail","crowd:"],"computed_at":"2026-10-17T05:46:00Z"},"pay":null,"html_url":"https://alion.io/job/rebellions-ip-design-engineer","json_url":"https://alion.io/job/rebellions-ip-design-engineer.json","meta":{"generated_at":"2026-10-18T08:18:57Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":12496,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-19T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":173},"rest":"https://alion.io/mcp/rest/get_company?id=173"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Frebellions-ip-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Frebellions-ip-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Frebellions-ip-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/rebellions-ip-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Frebellions-ip-design-engineer"}]}