{"id":2143225,"url":"https://alion.io/job/renesas-electronics-principal-design-verification-engineer-2","title":"Principal Design Verification Engineer","company":{"id":3481,"name":"Renesas Electronics","domain":"renesas.com","url":"https://alion.io/company/renesas-electronics","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SmartRecruiters","truth_index":{"grade":"B","score":75,"open_postings":97,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":33,"computed_at":"2026-10-16T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Chandler, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":140000,"max_usd":267000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":576},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Agile","optional":true}],"status":"live","first_seen_at":"2026-09-29T16:00:57Z","employer_posted_date":"2026-09-29","last_verified_at":"2026-10-16T08:14:32Z","board_verified":true,"closed_at":null,"days_open":16,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":16},"description":"We are seeking a Principal Design Verification Engineer to provide technical leadership for verification of next-generation semiconductor memory interface products, including data buffer silicon.\nThis role will drive verification strategy and execution for complex digital designs, working closely with design teams to ensure functionality, performance, and product requirements are met. The ideal candidate brings deep semiconductor verification expertise with SystemVerilog and UVM. Previous DDR or memory experience is an advantage, but is not required.\nThis is an opportunity to take significant technical ownership while contributing to next-generation DDR6 technology.\nKey Responsibilities\nLead verification strategy and execution for complex semiconductor designs at the block and system level.\nDefine verification methodologies, test plans, coverage strategies, and verification environments.\nArchitect, develop, maintain, and optimize SystemVerilog/UVM testbenches and verification environments.\nDrive test development, functional coverage, checkers, constrained-random verification, and coverage closure.\nTake technical ownership of verification for assigned blocks, features, and environments from planning through signoff.\nWork closely with RTL and design engineers to ensure designs meet functional and performance requirements and are effectively verifiable.\nAnalyze specifications, design implementation, and verification results to identify functional gaps and design issues.\nDrive debugging and resolution of complex verification failures.\nDevelop scalable and reusable verification components, methodologies, and best practices.\nIdentify and lead improvements in verification efficiency, quality, performance, and reuse.\nParticipate in architecture, feasibility, design, and technical reviews.\nProvide technical guidance and mentorship to verification engineers.\nServe as a technical expert for assigned verification methodologies and tools.\nCommunicate verification progress, coverage, technical risks, and readiness to engineering leadership and project stakeholders.\n Required Qualifications\nBachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.\nExtensive experience in semiconductor design verification, with demonstrated technical ownership of complex verification efforts.\nExpert-level proficiency with SystemVerilog.\nSignificant hands-on experience with UVM (Universal Verification Methodology), including development and optimization of UVM-based verification environments.\nExperience defining verification strategies and developing verification plans from design and product specifications.\nStrong experience with functional verification, constrained-random testing, functional coverage, checkers, debugging, and coverage closure.\nExperience partnering closely with RTL/design engineering teams throughout the verification lifecycle.\nDemonstrated ability to independently solve complex verification and design problems.\nAbility to provide technical leadership and mentoring within a verification team.\nPreferred Qualifications\nExperience with DDR, memory interfaces, memory controllers, data buffers, or related semiconductor technologies.\nExperience with DDR4 and/or DDR5.\nVerification experience with complex high-speed interfaces, protocols, or mixed-signal semiconductor products.\nExperience leading verification efforts through coverage closure and signoff.\n Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world-leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.\nAt Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.\nWe believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.\nAre you ready to join our team and shape the future with us?\nRenesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.\nRenesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.","description_format":"text","description_chars":5151,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[{"language":"English","level":"All levels","optional":false}]},"benefits":[],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Automotive Components","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-10-09T03:52:58Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 60 · green card filings: 30","filings_12m":60,"filings_prev_12m":78,"green_card_filings_12m":30,"median_offered_wage_usd":144222,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":23}],"liveness":{"score":57,"band":"ok","label":"Likely open","p_open":1,"p_active":0.635,"p_room":0.9,"age_days":16,"expected_fill_days":33,"reasons":["conf:2","stale_co","wave","velocity","win:mid","comp:brand"],"computed_at":"2026-10-16T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/renesas-electronics-principal-design-verification-engineer-2","json_url":"https://alion.io/job/renesas-electronics-principal-design-verification-engineer-2.json","meta":{"generated_at":"2026-10-16T09:50:48Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":8111,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-17T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3481},"rest":"https://alion.io/mcp/rest/get_company?id=3481"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Frenesas-electronics-principal-design-verification-engineer-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Frenesas-electronics-principal-design-verification-engineer-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Frenesas-electronics-principal-design-verification-engineer-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/renesas-electronics-principal-design-verification-engineer-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Frenesas-electronics-principal-design-verification-engineer-2"}]}