{"id":3357808,"url":"https://alion.io/job/renesas-electronics-principal-dft-engineer","title":"Principal DFT Engineer","company":{"id":3481,"name":"Renesas Electronics","domain":"renesas.com","url":"https://alion.io/company/renesas-electronics","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SmartRecruiters","truth_index":{"grade":"B","score":75,"open_postings":116,"ghost_share":0,"stale_share":0.983,"repost_share":0,"time_to_fill_p50_days":31,"computed_at":"2026-11-04T06:34:25Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"lead","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":19500,"max_usd":49000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":14},"experience_years_min":15,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Agile","optional":true}],"status":"live","first_seen_at":"2026-10-27T11:10:39Z","employer_posted_date":"2026-10-27","last_verified_at":"2026-11-04T06:48:55Z","board_verified":true,"closed_at":null,"days_open":7,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":7},"description":"Renesas is a global semiconductor leader shaping the backbone of next-generation automotive, industrial, cloud, and IoT innovation. With over $9.3 billion in annual revenue (2024) and a world-class team of 22,700+ employees, Renesas operates at scale while retaining the agility to drive category-defining breakthroughs. The company’s footprint spans more than 30 countries, enabling deep customer proximity and a uniquely global innovative engine. As Japan’s semiconductor powerhouse and a top global player in microcontrollers, analog, and power technologies, Renesas delivers real-world impact across EVs, smart factories, renewable energy infrastructure, and edge intelligence. For ambitious problem-solvers who want to work on meaningful, systems-level challenges with huge industry leverage, Renesas offers the scale, stability, and strategic clarity of a market leader-paired with the transformative momentum of a company reinventing how the world computes, connects, and electrifies.\nRenesas has a growing presence in India with HC approaching 1000+ and significant presence with active government and university collaboration as well as OSAT footprint (JV with CG India). With the growing importance of India as a market (Growing semiconductor market and government goals / mandates of localization needs) and talent hub, our division’s (India for India) mission is to grow India market. We aspire to create products (SoCs, Software, Power and Analog chips etc) which serve needs for local market. Renesas is a leading electronics supplier globally, and this is a unique opportunity to directly influence the future products which will be offered to our customers in a new, fast growing and large Indian market with specific needs and applications.\n We are looking for an experienced DFT Lead to own end-to-end Design-for-Test activities for complex Automotive MCU/SoC products. The role will drive DFT architecture, implementation, verification, and production-test readiness while working closely with SoC Design, Verification, PTE, Product and Test Engineering teams.\nKey Responsibilities\nOwn the DFT architecture and strategy for automotive MCU/SoC products from specification through silicon production readiness.\nDefine and implement DFT solutions including scan architecture, compression, memory BIST, logic BIST, boundary scan/JTAG and test access architecture, as applicable.\nDrive DFT implementation and associated RTL/design updates, working closely with SoC, IP and RTL design teams.\nOwn DFT verification and simulation, including test-mode validation, scan/MBIST connectivity, ATPG-related simulations and gate-level verification.\nDrive ATPG and pattern generation, validation and release of production-ready test patterns to Product and Test Engineering teams.\nAct as the primary technical interface with PTE/Product/Test teams for DFT, test-pattern and silicon-test requirements.\nWork with design teams to define and align DFT requirements, test modes, clocks, resets, power domains, constraints and chip-level integration requirements.\nReview DFT coverage, pattern count, test time and testability metrics, and drive closure of coverage gaps.\nSupport silicon bring-up, pattern debug, test failures and yield-related DFT investigations.\nOwn DFT deliverables, reviews, sign-off criteria and milestone tracking across the product development lifecycle.\nIdentify DFT-related technical and schedule risks early and drive cross-functional closure.\n Required Skills & Experience\n15+ year experience in DFT architecture and implementation for complex MCU/SoC devices.\nHands-on expertise in scan insertion, scan compression, ATPG, MBIST and JTAG/boundary scan.\nStrong understanding of RTL and gate-level design, clocks, resets, power domains and SoC integration.\nExperience with DFT simulation, pattern verification and gate-level simulation/debug.\nExperience in ATPG pattern generation, fault coverage analysis and production pattern delivery.\nGood understanding of the interface between design DFT and ATE/production testing.\nExperience working with Product Engineering and Test Engineering teams during silicon bring-up and production ramp.\nFamiliarity with industry-standard DFT tool flows from Siemens EDA, Synopsys and/or Cadence.\nStrong problem-solving and debugging skills with the ability to drive issues across multiple engineering organizations.\nAbility to independently lead DFT activities and communicate effectively with architecture, design, verification, physical design and product/test teams.\nPreferred Experience\nExperience with automotive MCU or automotive SoC development.\nExposure to ISO 26262 / functional safety requirements and their impact on test architecture.\nExperience with advanced DFT methodologies such as hierarchical test, embedded compression, logic BIST, repair/redundancy schemes or safety-oriented test features.\nUnderstanding of production test cost, test time, coverage, diagnostic requirements and yield considerations.\nWhat We Are Looking For\nWe are looking for someone who can take technical ownership of DFT, not just execute an established flow. The ideal candidate can make architecture decisions, work hands-on through implementation and verification, anticipate downstream production-test requirements, and effectively connect the design organization with Product and Test Engineering.\n Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world-leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.\nAt Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.\nWe believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.\nAre you ready to join our team and shape the future with us?\nRenesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.","description_format":"text","description_chars":6673,"description_truncated":false,"requirements":{"experience_years_min":15,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[{"language":"English","level":"All levels","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Automotive Components","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-10-27T20:26:55Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.631,"p_room":1,"age_days":7,"expected_fill_days":31,"reasons":["conf:4","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-11-04T06:34:25Z"},"pay":null,"html_url":"https://alion.io/job/renesas-electronics-principal-dft-engineer","json_url":"https://alion.io/job/renesas-electronics-principal-dft-engineer.json","meta":{"generated_at":"2026-11-04T10:48:31Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":16085,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-05T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3481},"rest":"https://alion.io/mcp/rest/get_company?id=3481"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Frenesas-electronics-principal-dft-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Frenesas-electronics-principal-dft-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Frenesas-electronics-principal-dft-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/renesas-electronics-principal-dft-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Frenesas-electronics-principal-dft-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3357808}},{"tool":"search_jobs","arguments":{"company":"renesas.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3357808},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}