{"id":3106672,"url":"https://alion.io/job/renesas-electronics-senior-digital-engineer-3","title":"Senior Digital Engineer","company":{"id":3481,"name":"Renesas Electronics","domain":"renesas.com","url":"https://alion.io/company/renesas-electronics","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SmartRecruiters","truth_index":{"grade":"B","score":75,"open_postings":107,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":30,"computed_at":"2026-10-24T06:02:35Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Chandler, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":117000,"max_usd":213000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":1396},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Agile","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-10-22T16:13:30Z","employer_posted_date":"2026-10-22","last_verified_at":"2026-10-25T00:55:31Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"Renesas Electronics is seeking a skilled and motivated Senior Digital Design Engineer to join our growing hardware development team in Chandler, AZ. In this role, you will be responsible for designing power and area-optimized digital circuits for complex mixed-signal applications.\nInterpret high level requirements to architect, design & integrate low-power digital circuits for mixed-signal data conversion and power management products in advanced process nodes.\nSupport full product lifecycle from concept to mass-production; communicating closely with wider organization through the various stages of silicon development.\nWork closely with Analog and Verification engineers to deliver high-quality silicon solutions.\nEnsuring digital development process is state-of-art and achieves budget, schedule, and project deliverable goals.\nDesigning digital RTL that meets timing, area, power and any adhering standards specifications.\nIntegrating design at the top level and running block & top-level simulations.\nParticipate in all aspects of Mixed-signal design flow - Micro-architecture, Design partitioning, RTL Verilog / SystemVerilog Design, Generating Timing Constraints, Synthesis, Interaction with P&R Team, Timing Analysis, LINT, CDC, RDC, UPF.\nWorking closely with P&R team to generate a layout that meets timing, area, and power requirements.\nSupport DFT strategy and implementation, and review test case development.\nAssisting with top level test-bench debug, and running RTL & gate level simulations\nWorking with analog and digital verification engineers to come up with complex test scenarios for pre-silicon verification.\nSupporting analog team to develop AMS, SystemVerilog or Verilog-real behavioral models.\nDeveloping detailed block & chip level design documents and collateral.\nHolding and participating in key design reviews and completion of various checklists.\nPerform silicon evaluation as required.\nDocument device errata, develop work-around solutions, implement engineering changes when necessary.\n >5 years of digital design experience in one of the following areas: wireless handheld, data conversion, and power management.\nDegree-level qualification in Electrical Engineering, Electronics, Computer Engineering, Computer Science, or a related discipline.\nFluent in Verilog / SystemVerilog RTL for digital CMOS circuit design.\nStrong understanding of ASIC design methodology.\nStrong understanding of Lint, CDC & RDC tools.\nStrong understanding of block-level & chip-level verification techniques.\nStrong & proven ability to debug both RTL & gate-level simulations.\nMandatory competence in written and verbal English.\nWillingness to travel domestically or internationally on short notice.\nAbility to work independently and collaboratively.\nPreferred: experience with mixed-signal design methodologies.\nPreferred: experience developing design constraints and hand-off to P&R.\nPreferred: experience with STA and timing closure.\nPreferred: experience with low-power design techniques, including clock and power gating (UPF).\nPreferred: experience with power analysis and optimization.\nPreferred: experience with advanced verification methodologies (UVM).\nPreferred: experience with industry-standard protocols such as AMBA or I2C.\n Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world-leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.\nAt Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.\nWe believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.\nAre you ready to join our team and shape the future with us?\nRenesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.\nRenesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.","description_format":"text","description_chars":4942,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[{"language":"English","level":"All levels","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Automotive Components","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-10-22T19:29:33Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 60 · green card filings: 30","filings_12m":60,"filings_prev_12m":78,"green_card_filings_12m":30,"median_offered_wage_usd":144222,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":23}],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":1,"expected_fill_days":30,"reasons":["conf:3","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-24T06:02:35Z"},"pay":null,"html_url":"https://alion.io/job/renesas-electronics-senior-digital-engineer-3","json_url":"https://alion.io/job/renesas-electronics-senior-digital-engineer-3.json","meta":{"generated_at":"2026-10-25T01:25:20Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":2209,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-26T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3481},"rest":"https://alion.io/mcp/rest/get_company?id=3481"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Frenesas-electronics-senior-digital-engineer-3"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Frenesas-electronics-senior-digital-engineer-3"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Frenesas-electronics-senior-digital-engineer-3"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/renesas-electronics-senior-digital-engineer-3\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Frenesas-electronics-senior-digital-engineer-3"}]}