{"id":2462348,"url":"https://alion.io/job/renesas-electronics-senior-layout-engineer-fmd","title":"(Senior) Layout Engineer (f/m/d)","company":{"id":3481,"name":"Renesas Electronics","domain":"renesas.com","url":"https://alion.io/company/renesas-electronics","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SmartRecruiters","truth_index":{"grade":"B","score":75,"open_postings":100,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":32,"computed_at":"2026-10-15T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bingen, Germany"],"countries":["DE"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":88000,"max_usd":161000,"period":"year","method":"role_seniority_country_cell","sample_n":8},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Virtuoso","optional":false},{"name":"Agile","optional":true}],"status":"live","first_seen_at":"2026-10-13T08:22:49Z","employer_posted_date":"2026-10-13","last_verified_at":"2026-10-15T20:33:40Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"To further strengthen our Automotive Sensors business comprising Sensor ASICs, Sensor ASSPs, Position Sensors, LiDAR ASICs and Environmental Sensors, we are currently looking for an Analog IC Layout Engineer (F/M/D) to join our engineering team in Dresden, Munich or Bingen am Rhein, Germany, for developing our new and next generation ICs, integrated sensors, innovations, power and mixed signal technologies besides supporting modifications to existing products.\nYour Role:\nCreate block-level and top-level layout design and implement them according to Renesas product development process following best practices from the industry\n\nOwn layout design for multiple tape outs of ICs and test structures\n\nImplementation of the chip level layout requirements with efficiency and accuracy using industry standard design flows - parameterized layout, LVS, DRC and DFM\n\nSupport block-level and top-level specifications\n\nImplement analog layout dependent design for yield and manufacturability\n\nEnsure block- and top-level Design Rule Checks (DRC) and Layout versus Schematics Checks (LVS).\n\nEnsure optimized silicon COGS and deliver optimized layouts that are first time right\n\n Your Profile:\nDegree in Electrical Engineering, Electronics, Microelectronics, Microsystems or similar\n\nFundamental knowledge on Semiconductor Device Physics and Microelectronics is required\n\nExperience with Cadence Virtuoso and other Cadence tools\n\nExperience with layout verification using Calibre DRC and LVS layout verification tools\n\nExperience with parasitic extraction using Calibre and Cadence tools and their analysis.\n\nHigh level of self-motivation, drive, open-mindedness and teamwork skills are desired\n\nGood communication and technical reporting skills, both written and oral\n\nFluent English and German knowledge would be a plus\n\n Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world-leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.\nAt Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.\nWe believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.\nAre you ready to join our team and shape the future with us?\nRenesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.","description_format":"text","description_chars":3139,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[{"language":"German","level":"Advanced (C1)","optional":false},{"language":"English","level":"Advanced (C1)","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Automotive Components","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-10-13T17:39:26Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":1,"expected_fill_days":32,"reasons":["conf:0","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-15T05:46:00Z"},"pay":null,"html_url":"https://alion.io/job/renesas-electronics-senior-layout-engineer-fmd","json_url":"https://alion.io/job/renesas-electronics-senior-layout-engineer-fmd.json","meta":{"generated_at":"2026-10-15T22:57:36Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":34879,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-16T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3481},"rest":"https://alion.io/mcp/rest/get_company?id=3481"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Frenesas-electronics-senior-layout-engineer-fmd"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Frenesas-electronics-senior-layout-engineer-fmd"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Frenesas-electronics-senior-layout-engineer-fmd"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/renesas-electronics-senior-layout-engineer-fmd\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Frenesas-electronics-senior-layout-engineer-fmd"}]}