{"id":2962290,"url":"https://alion.io/job/renesas-electronics-wafer-fab-yield-process-engineer","title":"Wafer Fab Yield Process Engineer","company":{"id":3481,"name":"Renesas Electronics","domain":"renesas.com","url":"https://alion.io/company/renesas-electronics","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SmartRecruiters","truth_index":{"grade":"B","score":75,"open_postings":106,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":31,"computed_at":"2026-10-22T06:10:10Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Palm Bay, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":66000,"max_usd":155000,"period":"year","method":"role_country_seniority_unknown","sample_n":14270},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"JMP","optional":false},{"name":"Statistical Process Control","optional":false},{"name":"Agile","optional":true}],"status":"live","first_seen_at":"2026-10-20T19:10:45Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-22T23:26:32Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"The Senior Wafer Fab Yield Engineer is responsible for driving systematic yield improvement across semiconductor wafer fabrication. This position analyzes manufacturing, inline metrology, defect, wafer-level electrical test, and process data to identify yield-loss mechanisms, determine root causes, and lead implementation of sustainable corrective actions.\nThe engineer serves as a senior technical resource connecting fab process performance to device and product yield. The role works cross-functionally with Process Engineering, Equipment Engineering, Process Integration, Product/Test Engineering, Failure Analysis, Quality, and Manufacturing to improve yield, reduce variability, and accelerate resolution of complex manufacturing problems.\nResponsibilities:\nLead wafer-fab yield improvement initiatives, identifying and prioritizing the dominant yield-loss mechanisms and converting analysis into actionable improvement projects.\nAnalyze wafer probe maps, electrical test/bin data, inline metrology, defect inspection data, equipment/process history, and lot genealogy to isolate sources of systematic and random yield loss.\nPerform correlation, regression, statistical analysis, wafer spatial analysis, trend analysis, and other data-mining techniques to identify relationships between process conditions and electrical yield.\nLead complex root-cause investigations involving process excursions, recurring yield degradation, wafer-level signatures, equipment effects, materials, and process interactions.\nPartner with Process and Equipment Engineering to translate yield signatures into physical process hypotheses and validate corrective actions.\nDefine and execute structured experiments and DOE to validate suspected yield drivers and optimize process windows.\nUse SPC and process-capability analysis to identify process variation and opportunities for improved manufacturing control.\nCorrelate WAT, wafer sort, inline process-monitoring, defect, and manufacturing data to identify yield improvement opportunities.\nWork with Failure Analysis teams to develop appropriate physical-analysis plans and translate findings into manufacturing actions.\nDevelop analyses and engineering reports that clearly communicate yield trends, excursions, root causes, improvement opportunities, and project status.\nLead cross-functional technical reviews for significant yield excursions and improvement programs.\nSupport new-product and/or technology introduction by identifying yield risks, establishing baseline performance, and accelerating learning during manufacturing ramp.\nMentor less-experienced engineers in statistical analysis, structured problem solving, yield analysis, and fab troubleshooting.\nIdentify opportunities to improve fab-wide yield-analysis methods, data infrastructure, and problem-solving practices.\n Bachelor's degree in Electrical Engineering, Applied Physics, or a related technical discipline.\nSignificant engineering experience in semiconductor wafer fabrication, preferably involving yield, process integration, process engineering, product engineering, or device engineering.\nStrong understanding of semiconductor wafer fabrication processes and the relationship between process variation, device characteristics, defects, and electrical yield.\nDemonstrated ability to perform statistical analysis and solve complex manufacturing problems using large manufacturing datasets.\nExperience with statistical/data-analysis tools such as JMP, or comparable platforms.\nWorking knowledge of SPC, DOE, process capability, correlation/regression, hypothesis testing, and structured root-cause analysis.\nAbility to communicate complex technical conclusions clearly to engineering and manufacturing organizations.\nDemonstrated ability to lead cross-functional technical problem-solving efforts.\nPreferred Qualifications\nMaster's degree in Electrical Engineering, Applied Physics, or related discipline.\nExperience correlating inline process/defect data → WAT/electrical data → wafer-sort/final yield.\nExperience with wafer-map and spatial-pattern analysis.\nExperience with semiconductor defect inspection and/or physical failure analysis.\nExperience creating automated yield-analysis or data-mining tools.\nKnowledge of semiconductor device physics and electrical test structures.\nExperience supporting technology or product ramps in a high-volume wafer fabrication environment\nDue to the nature of this position and the required access to areas where ITAR-controlled articles and/or technical data may be present, candidates must meet the applicable U.S. person requirements for ITAR access. This includes individuals who are:\nA U.S. citizen or U.S. national;\nA lawful permanent resident (Green Card holder); or\nA protected individual as defined by 8 U.S.C. § 1324b(a)(3).\n This role is 100% onsite in Palm Bay, FL.\nMedical, Dental, Vision Insurance from day one.\n3 weeks of accrued vacation per year\n13 paid Holidays per year\nGenerous 401K plan that includes employer matching up to 6%\nTuition Reimbursement\nProfit Sharing Bonus\nRenesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world-leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.\nAt Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.\nWe believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.\nAre you ready to join our team and shape the future with us?\nRenesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.\nRenesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.","description_format":"text","description_chars":6734,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":true,"languages":[{"language":"English","level":"All levels","optional":false}]},"benefits":["401k plan","Vision insurance"],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Automotive Components","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-10-20T23:12:32Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 60 · green card filings: 30","filings_12m":60,"filings_prev_12m":78,"green_card_filings_12m":30,"median_offered_wage_usd":144222,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":0}],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":1,"expected_fill_days":31,"reasons":["conf:1","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-22T06:10:10Z"},"pay":null,"html_url":"https://alion.io/job/renesas-electronics-wafer-fab-yield-process-engineer","json_url":"https://alion.io/job/renesas-electronics-wafer-fab-yield-process-engineer.json","meta":{"generated_at":"2026-10-23T00:10:13Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":218,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-24T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3481},"rest":"https://alion.io/mcp/rest/get_company?id=3481"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Frenesas-electronics-wafer-fab-yield-process-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Frenesas-electronics-wafer-fab-yield-process-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Frenesas-electronics-wafer-fab-yield-process-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/renesas-electronics-wafer-fab-yield-process-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Frenesas-electronics-wafer-fab-yield-process-engineer"}]}