{"id":2782216,"url":"https://alion.io/job/saic-fpgaembedded-hardware-design-engineer","title":"FPGA/Embedded Hardware Design Engineer","company":{"id":58788,"name":"SAIC","domain":"saic.com","url":"https://alion.io/company/saic","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Oracle","truth_index":{"grade":"B","score":82,"open_postings":56,"ghost_share":0,"stale_share":0.911,"repost_share":0,"time_to_fill_p50_days":16,"computed_at":"2026-10-21T05:46:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["College Park, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":149000,"max_usd":272000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":527},"experience_years_min":9,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Bash","optional":false},{"name":"C++","optional":false},{"name":"Git","optional":false},{"name":"Linux","optional":false},{"name":"Python","optional":false},{"name":"Riviera-PRO","optional":false},{"name":"Siemens ModelSim","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"Vitis","optional":false},{"name":"Xilinx Vivado","optional":false}],"status":"live","first_seen_at":"2026-10-16T17:21:07Z","employer_posted_date":"2026-10-16","last_verified_at":"2026-10-21T06:40:56Z","board_verified":true,"closed_at":null,"days_open":4,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":4},"description":"SAIC is seeking an experienced FPGA/Embedded-Systems Engineer to design, verify, and integrate advanced digital processing architectures. The ideal candidate will possess strong FPGA development experience using VHDL and Verilog, along with embedded software skills and a deep understanding of digital signal processing, timing closure, and Linux-based workflows. This role requires the ability to solve complex technical problems and deliver robust production-ready designs.\n Key Responsibilities:\nDevelop FPGA architectures using VHDL-2019, VHDL-2008, VHDL, and basic Verilog as required. \nDesign solutions targeting Xilinx UltraScale+ MPSoC devices; experience with Versal devices is a strong plus. \nCreate self-checking simulation constructs and testbenches to validate functional and corner-case behavior. \nScript simulation, synthesis, and implementation workflows using Tcl and shell scripting to automate toolflows. \nImplement high-throughput streaming data paths, including FIFO structures, CDC mechanisms, circular buffers, clocking architectures, and timing constraints. \nPerform FPGA debug through HDL simulation, waveform analysis, hardware debugging, and logic analyzer tools. \nDevelop and debug embedded software in C, C++, Python, and related languages to interface with FPGA logic. \nContribute to DSP algorithm design when needed, depending on project requirements. \nWork with SDR platforms such as Ettus USRP, Epiq Matchstiq, and Pluto SDR to support system-level development. \nApply knowledge of microcontroller firmware design for supporting embedded subsystems. \nDevelop on Linux systems and write automation scripts using Bash. \nUse Xilinx Vivado and Vitis toolchains including Hardware Manager, IP Integrator, IP packaging, and XSim simulation. \nSimulate HDL using tools such as Aldec Riviera Pro and ModelSim for detailed design verification. \nBuild customized embedded Linux distributions for MPSoC and Versal devices using Yocto. \nSet up and debug FlexLM license servers as part of maintaining development environments. \nLeverage AI/ML code assistants to enhance development efficiency when appropriate. \nUse Git for version control and collaborative software and FPGA development. \nRequired Education:\nBachelors and fourteen (14) years or more experience; Masters and twelve (12) years or more experience; PhD or JD and nine (9) years or more experience.\nAdditional experience may be substituted for a degree\nClearance Requirement:\nMust be a U.S. citizen with an active TS/SCI with Polygraph level clearance","description_format":"text","description_chars":2534,"description_truncated":false,"requirements":{"experience_years_min":9,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":true,"languages":[]},"benefits":[],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Digital Government","Systems Integrators","Engineering Services"],"lifecycle":[{"event":"open","at":"2026-10-17T13:16:11Z"}],"visa":[],"liveness":{"score":62,"band":"ok","label":"Likely open","p_open":1,"p_active":0.623,"p_room":1,"age_days":4,"expected_fill_days":16,"reasons":["conf:3","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-21T05:46:15Z"},"pay":null,"html_url":"https://alion.io/job/saic-fpgaembedded-hardware-design-engineer","json_url":"https://alion.io/job/saic-fpgaembedded-hardware-design-engineer.json","meta":{"generated_at":"2026-10-21T09:51:15Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":13978,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-22T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":58788},"rest":"https://alion.io/mcp/rest/get_company?id=58788"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsaic-fpgaembedded-hardware-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsaic-fpgaembedded-hardware-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsaic-fpgaembedded-hardware-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/saic-fpgaembedded-hardware-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsaic-fpgaembedded-hardware-design-engineer"}]}