{"id":3684315,"url":"https://alion.io/job/samsung-electronics-hw-verification-engineering-lead","title":"HW Verification Engineering Lead","company":{"id":166,"name":"Samsung Electronics","domain":"samsung.com","url":"https://alion.io/company/samsung","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":85,"open_postings":140,"ghost_share":0.007,"stale_share":0.543,"repost_share":0.057,"time_to_fill_p50_days":36,"computed_at":"2026-11-08T05:47:12Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Phoenix, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Claude","optional":false},{"name":"Python","optional":false},{"name":"SystemC","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-11-03T14:23:02Z","employer_posted_date":"2026-11-03","last_verified_at":"2026-11-08T10:00:54Z","board_verified":true,"closed_at":null,"days_open":4,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":4},"description":"Position Summary\n- Design, development & verification of H/W IP for camera, multimedia and display pipelines in smartphonesRole and Responsibilities\nAs the lead of IP Verification / Pre-Silicon Validation, you will head a team responsible for the verification of our next generation purpose specific custom HW IP. This critical role spans both in-house IP development as well as strategic evaluation, integration and validation of various other IP blocks. You will bridge the gap between technical execution and people mentorship, ensuring delivery, high quality, high performance and power - efficient hardware Ips that drive and differentiate our product line over competitors..\nSkills and Qualifications\nKEY RESPONSIBILITIES:\nTECHNICAL EXECUTION AND DELIVERY:\nOversee the end-to-end IP lifecycle and Advanced verification\nEnsure robust validation methods utilised to ensure zero-bug silicon\nDefine and Implement best-in-class engineering practices, checklists and design flows to maximise efficiency\nTECHNICAL COMPETENCIES:\nVerification / Emulation\nUnderstanding of digital design principles, algorithm, design and Architecture specifications\nUnderstanding of SystemC, C and Python Programming\nDesign direction in terms of performance, gate count and power for various digital designs\nProficient in System Verilog/UVM/OVM\nFPGA IP/Custom ASIC Prototyping and Validation\nDeveloping scalable Test benches in System Verilog and UVM\nUnderstanding of cameras / multimedia / display /NPU subsystems in detail\nProven track record of integrating complex sub-systems (PCIe, USB, DDR, ARM/RISC-V Cores, MIPI etc)\nDesign - knowledge in Verilog, Linting, (CDC) clock domain crossing, synthesis, Timing Analysis, Low Power Implementation (UPF/CPF, Clock Gating, Power Domain)\nUsage for AI Tool e.g., Claude for IP development enhancement, KPI exploration.\nKEY LEADERSHIP TRAIT:\nPeople Developer\nCross Functional Bridge\nResource Optimiser\nDecisive Problem Solver\nInfluencer and Navigator\nDESIRED QUALIFICATION\nGraduate / Post Graduate in Electrical / Electronic Engineering / VLSI Design / Microelectronics\n** Samsung/SRI-B has a strict policy on trade secrets. In applying to Samsung/SRI-B and progressing through the recruitment process, you must not/ you are not required to disclose any trade secrets of your current or previous employer.\n* Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. 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