{"id":2376660,"url":"https://alion.io/job/samsung-electronics-principal-micro-architect-coherent-interconnect","title":"Principal Micro-architect, Coherent Interconnect","company":{"id":166,"name":"Samsung Electronics","domain":"samsung.com","url":"https://alion.io/company/samsung","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":132,"ghost_share":0,"stale_share":0.621,"repost_share":0.015,"time_to_fill_p50_days":31,"computed_at":"2026-10-21T05:46:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Jose, United States","Austin, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":221700,"max":364800,"currency":"USD","period":"year","gross":null,"usd_annual":364800},"salary_estimate":null,"experience_years_min":15,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-10-12T18:42:48Z","employer_posted_date":"2026-10-12","last_verified_at":"2026-10-20T16:50:15Z","board_verified":true,"closed_at":null,"days_open":9,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":9},"description":"Position Summary\nSamsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy - the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices consumed by millions of people around the world. Come build with us!Role and Responsibilities\nAs a Principal Micro-architect, you will lead the microarchitecture development of custom coherent interconnect IP and/or last-level cache (LLC) blocks for next-generation designs. In this role, you will drive key aspects of coherent interconnect RTL design, including performance and power optimization, logic debug, and timing closure. Success in this role requires a strong foundation in computer architecture, microarchitecture, and RTL design.\nOwn the development and delivery of custom coherent interconnect IP and/or LLC blocks, ensuring high-quality execution and timely project completion.\nCollaborate closely with system architects to define and develop next-generation coherent interconnect and LLC architectures.\nDrive microarchitecture definition and specification, from early architectural exploration and microarchitectural research through detailed specification development and refinement.\nPartner with verification teams to ensure functional correctness and robust validation of the design.\nDevelop high-quality RTL implementations that meet performance, power, and area (PPA) goals.\nWork with performance and power teams to optimize architecture and RTL implementations for efficiency and scalability.\nCollaborate with physical design and CAD teams to resolve implementation, timing, and integration challenges.\nProvide technical leadership and mentorship to junior engineers across the team.\nSkills and Qualifications\n15+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 13+ years of experience with a Master’s degree, or 11+ years of experience with a PhD\nStrong background driving RTL design of coherent interconnect and LLC sub-blocks for high-performance digital designs\nDemonstrated experience spanning architecture definition through RTL implementation\nFamiliarity with on-chip network topologies such as mesh, ring, and crossbar interconnects, along with working knowledge of Arm AMBA5 CHI, AMBA4 ACE, AXI, and related coherent interconnect protocols.\nDeep expertise in Verilog/SystemVerilog and solid understanding of the complete ASIC design flow including STA, DFT, ECO flows, etc.\nStrong understanding of memory subsystem architecture, coherent cache design, system caches, coherency mechanisms, and directory-based snoop filter protocols.\nProven experience leading technical initiatives, mentoring engineers, and collaborating effectively across dynamic, geographically distributed teams with strong communication and interpersonal skills.\nExperience with a scripting language like Perl or Python is a plus\nOur Team\nOur System IP team develops proprietary coherent interconnect and memory controller deployed in many high-volume products. Our team plays a key role in influencing the product roadmap for a market-leading system IP solutions. We focus on delivering system modeling capability based on optimization and use-case-driven analysis (gaming, computational photography) that enables a world-class memory subsystem.\nWith architecture scalability at the frontier of our design focus, our performance- and power-optimized IP solution gets integrated into complex semiconductor products, aiming to reach multiple market segments.\nBeing part of a new team of talented individuals with vastly diverse backgrounds and skill sets at a well-established global company means you have limitless room to explore, innovate, and expand role responsibilities to build technical expertise. With a big charter ahead, we get to do challenging work and solve unique problems in a highly collaborative and supportive environment. You will always be learning while helping us shape the team’s culture.\nTotal Rewards\nAt Samsung - SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $221,700 and $364,800. Your actual base pay will depend on variables that may include your education skills, qualifications, experience, and work location. This is an exempt position, which is not eligible for overtime pay under the Fair Labor Standards Act (FLSA).\nSamsung employees have access to benefits including: medical, dental, vision, life insurance, 401(k), free onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, wellness incentives, and many more. In addition, regular full-time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance.\nAdditionally, this role might be eligible to participate in long term incentive plan and relocation.\nTrade Secrets\nBy submitting an application, you agree not to disclose to Samsung or induce or encourage Samsung to use any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.\nU.S. Export Control\nThis role may require access to information subject to U.S. export control laws. Applicants must be authorized to access such information or eligible for government authorization.\n#SARC #ACL\n* Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here.\n* Samsung Electronics America, Inc. and its subsidiaries are committed to employing a diverse workforce, and provide Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.","description_format":"text","description_chars":6306,"description_truncated":false,"requirements":{"experience_years_min":15,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Life insurance"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":true,"industries":["Smartphones","Televisions","Semiconductor Manufacturing","Displays & Panel Technology"],"lifecycle":[{"event":"open","at":"2026-10-12T18:42:48Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 132 · green card filings: 34","filings_12m":132,"filings_prev_12m":178,"green_card_filings_12m":34,"median_offered_wage_usd":166084,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":39}],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":8,"expected_fill_days":31,"reasons":["conf:12","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-21T05:46:15Z"},"pay":{"stated_usd_annual":364800,"is_top_pay":true},"html_url":"https://alion.io/job/samsung-electronics-principal-micro-architect-coherent-interconnect","json_url":"https://alion.io/job/samsung-electronics-principal-micro-architect-coherent-interconnect.json","meta":{"generated_at":"2026-10-21T19:00:52Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":26928,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-22T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":166},"rest":"https://alion.io/mcp/rest/get_company?id=166"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsamsung-electronics-principal-micro-architect-coherent-interconnect"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsamsung-electronics-principal-micro-architect-coherent-interconnect"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsamsung-electronics-principal-micro-architect-coherent-interconnect"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/samsung-electronics-principal-micro-architect-coherent-interconnect\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsamsung-electronics-principal-micro-architect-coherent-interconnect"}]}