{"id":3341688,"url":"https://alion.io/job/semron-senior-ic-layout-physical-design-engineer","title":"Senior IC Layout & Physical Design Engineer","company":{"id":184516,"name":"Semron","domain":"semron.com","url":"https://alion.io/company/semron-2","size_band":"11-50","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Personio","truth_index":{"grade":"B","score":75,"open_postings":7,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-11-03T05:54:40Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Dresden, Germany"],"countries":["DE"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":91000,"max_usd":173000,"period":"year","method":"role_seniority_country_cell","sample_n":9},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Virtuoso","optional":false},{"name":"Python","optional":false},{"name":"Synopsys Custom Compiler","optional":false}],"status":"live","first_seen_at":"2026-10-27T14:11:17Z","employer_posted_date":"2026-10-27","last_verified_at":"2026-11-04T03:03:14Z","board_verified":true,"closed_at":null,"days_open":7,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":7},"description":"About the Role\nWe are seeking a Senior IC Layout & Physical Design Engineer to implement high-quality analog and mixed-signal layouts and contribute to full-chip physical integration of our CapRAM-based AI hardware. You will work closely with circuit designers and other engineering teams, taking ownership of layout implementation, physical verification, and chip-level integration through tape-out.What you will do:\nImplement and optimize precision analog and mixed-signal layouts, applying advanced matching techniques such as interdigitation, common-centroid placement, symmetry, shielding, and guard rings.\nPerform full-chip integration, including block placement, I/O ring implementation, power distribution networks, and global/local signal routing using routing conduits and structured routing methodologies.\nOptimize layouts for matching, parasitic effects, noise isolation, signal integrity, and power distribution.\nPerform physical verification, including Design Rule Checking (DRC), Layout Versus Schematic (LVS), Electrical Rule Checking (ERC), electromigration (EM), and IR-drop analysis, and resolve identified violations.\nCollaborate with analog and digital design engineers on floorplanning, layout constraints, and integration requirements.\nSupport parasitic extraction, post-layout verification, and final layout sign-off for tape-out.\nWhat you should bring in:\nBachelor's degree in Electrical Engineering, Microelectronics, or a related field, or equivalent relevant industry experience.\nMinimum 5 years of hands-on experience in analog or mixed-signal IC layout design.\nStrong understanding of CMOS layout principles, semiconductor process technologies, and layout-dependent effects.\nProficiency with Cadence Virtuoso or Synopsys Custom Compiler.\nExperience with industry-standard physical verification tools and flows for DRC, LVS, DFM and parasitic extraction.\nDemonstrated experience with chip-level integration, floorplanning, I/O rings, power distribution, and hierarchical routing.\nExperience taking IC layouts through physical verification and tape-out\nExperience with advanced CMOS process technologies, including FD-SOI, high-voltage BCD and multi-layer interconnect structures.\nStrong ownership mentality.\nEffective team communication.\nHelpful but not required:\nExperience with large-scale mixed-signal chip integration and complex power distribution networks.\nExperience with FinFET technologies.\nExperience with layout automation, scripting, or productivity tools such as SKILL, Tcl, or Python.\nWhy us?\nWe offer the opportunity to develop innovative AI hardware accelerator based on SEMRON's proprietary CapRAM technology in a dynamic startup environment with challenging technical problems, opportunities for professional growth and close collaboration with a multidisciplinary team across analog, digital and device engineering teams. You will have significant technical ownership of analog layout and chip-level physical integration.","description_format":"text","description_chars":2969,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":true},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"Germany","iso":"DE","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-27T15:48:27Z"}],"visa":[],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":6,"expected_fill_days":30,"reasons":["conf:2","win:early"],"computed_at":"2026-11-03T05:54:40Z"},"pay":null,"html_url":"https://alion.io/job/semron-senior-ic-layout-physical-design-engineer","json_url":"https://alion.io/job/semron-senior-ic-layout-physical-design-engineer.json","meta":{"generated_at":"2026-11-04T06:09:43Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":9570,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-05T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":184516},"rest":"https://alion.io/mcp/rest/get_company?id=184516"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsemron-senior-ic-layout-physical-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsemron-senior-ic-layout-physical-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsemron-senior-ic-layout-physical-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/semron-senior-ic-layout-physical-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsemron-senior-ic-layout-physical-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3341688}},{"tool":"search_jobs","arguments":{"company":"semron.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3341688},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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