{"id":2641269,"url":"https://alion.io/job/semtech-design-verification-manager","title":"Design Verification Manager","company":{"id":58922,"name":"Semtech","domain":"semtech.com","url":"https://alion.io/company/semtech","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":75,"open_postings":22,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":24,"computed_at":"2026-10-16T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Diego, United States","San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":116000,"max":216000,"currency":"USD","period":"year","gross":null,"usd_annual":216000},"salary_estimate":null,"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"CI/CD","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-10-14T00:00:00Z","employer_posted_date":"2026-10-14","last_verified_at":"2026-10-15T23:17:44Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"Location: San Diego, CA or San Jose, CA - Hybrid (Friday Remote)\nOur Team:\nSemtech Corporation is a leading supplier of analog and mixed-signal semiconductors for high-end consumer, enterprise computing, communications, and industrial equipment. As our future market opportunities have increased in recent years, we have continued to invest in disruptive analog and mixed-signal platforms and have created innovative new solutions for a wide range of leading edge products.\nThe Sensing Product Group located in our San Diego office has unique expertise in system level platform solutions for Sensing Products including Touch & Proximity. These are leading edge low power touch-interface solutions integrated with highly accurate ADCs for enhanced sensing performance. These ultra-small, feature-rich sensing systems are optimized for a wide range of battery-powered, portable applications such as smartphones, laptops, tablets, wearables, handheld devices and other consumer or industrial/telecommunications/automotive (ITA) control applications.\nJob Summary:\nThe Design Verification (DV) Manager is responsible for leading a verification team, developing and implementing verification plans for a variety of mixed-signal integrated circuit blocks and systems. The Design Verification Manager will closely collaborate with system, digital, firmware, analog, and cross-functional teams.\nThe role includes technical leadership, mentoring and supervision of verification engineers, reporting to engineering leadership and program management, and support to silicon validation, production test and application engineers.\nResponsibilities:\nLead, mentor and develop a team of geographically distributed verification engineers across multiple projects. Manage verification team deliverables, quality, schedules, and resource allocation for concurrent projects. \nDrive definition and implementation of comprehensive verification strategies, test plans for digital/mixed-signal integrated circuit designs at block and top levels. Work closely with design teams to understand micro-architecture and specifications. Direct detailed test plans, coverage models, and verification environments. Drive coverage closure including functional, code, and assertion-based coverage. Generate technical documentation and drive verification reviews. \nManage design and implementation of complex testbenches using SystemVerilog and UVM methodology. Lead block and chip-level register-transfer level (RTL), gate-level and analog/mixed-signal (AMS) verification. Develop directed test cases, constrained-random verification environments and reusable verification components. Improve verification scalability and portability from project to project by environment enhancement and tools automation. Establish and manage continuous integration, regression testing, scoreboards, monitors, and checkers. \nReport to engineering leadership and program management. Track and report verification progress using quantitative metrics and coverage analysis. Identify and mitigate verification risks early. \nInterface with system, digital hardware, embedded firmware, analog, and cross-functional teams. \nDrive adoption of advanced verification methodologies, best practices and tool evaluation. \nTechnical support to silicon lab evaluation, test, product and application engineers.\nMinimum Qualifications:\n10+ years of industry experience in integrated circuit design verification (DV)\nB.S. or M.S. in Electrical or Computer Engineering\nExperience leading, mentoring or informally managing engineers or projects\nStrong analytical, synthesis and problem-solving skills\nIn-depth knowledge and experience in digital integrated circuit verification with MCU-based hardware systems (ARM, RISC-V, PIC, STM32) with memories, custom digital micro-architecture, interfaces, dedicated hardware peripherals, external IPs, and analog peripherals.\nProficiency in SystemVerilog as high-level verification language and UVM implementation, Verilog/VHDL, scripting languages (Python, Perl), debugging capabilities, and industry leading EDA verification tools (Synopsys, Siemens, Cadence)\nDemonstration of technical leadership\nIndependent, self-motivated, rigorous, innovative, team player and able to follow through\nExcellent verbal and written communication skills\nDesired Qualifications:\nKnowledge of system-level aspects: signal processing, mixed-signal, digital hardware, embedded firmware, analog, modeling, test and application\nExperience with standard hardware protocols (I2C, I3C, SPI, MIPI)\nExperience in mixed-signal products, design and analog/mixed-signal (AMS) verification.\nExperience with analog block behavioral modeling with SV RNM/Verilog/VHDL\nExperience with consumer and/or ITA market circuit developments\nThe intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform job-related tasks other than those specifically included in this description.\nAll duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities.\nWe are proud to be an EEO employer M/F/D/V. We maintain a drug-free workplace.\nA reasonable estimate of the base pay range for this position is USD $116,000 - $216,000. There are several factors taken into consideration in determining base salary, including but not limited to: job-related qualifications, skills, education and experience, as well as job location and the value of other elements of an employee’s total compensation package.","description_format":"text","description_chars":5627,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["RF & Wireless Hardware","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-10-15T18:57:16Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 6 · green card filings: 3","filings_12m":6,"filings_prev_12m":1,"green_card_filings_12m":3,"median_offered_wage_usd":130833,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":3}],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":2,"expected_fill_days":24,"reasons":["conf:6","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-16T05:45:00Z"},"pay":{"stated_usd_annual":216000,"is_top_pay":false},"html_url":"https://alion.io/job/semtech-design-verification-manager","json_url":"https://alion.io/job/semtech-design-verification-manager.json","meta":{"generated_at":"2026-10-16T17:58:02Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":2792,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-17T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":58922},"rest":"https://alion.io/mcp/rest/get_company?id=58922"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsemtech-design-verification-manager"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsemtech-design-verification-manager"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsemtech-design-verification-manager"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/semtech-design-verification-manager\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsemtech-design-verification-manager"}]}