{"id":1842589,"url":"https://alion.io/job/semtech-senior-staff-digital-design-engineer","title":"Senior Staff Digital Design Engineer","company":{"id":58922,"name":"Semtech","domain":"semtech.com","url":"https://alion.io/company/semtech","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":75,"open_postings":22,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":24,"computed_at":"2026-10-16T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["Neuchâtel, Switzerland"],"countries":["CH"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":112500,"max":150000,"currency":"CHF","period":"year","gross":null,"usd_annual":180477},"salary_estimate":null,"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Formal Verification","optional":false},{"name":"Git","optional":false},{"name":"LoRaWAN","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-08-04T00:00:00Z","employer_posted_date":"2026-08-04","last_verified_at":"2026-10-15T23:17:44Z","board_verified":true,"closed_at":null,"days_open":73,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":73},"description":"Location: Neuchâtel, Switzerland\nOur Team:\nSemtech’s Wireless and LoRa® system teams in Neuchâtel and Grenoble are globally recognised leaders in Low Power Wide Area Network (LPWAN) technology. Our engineers work across the full system stack - from RF and analog design through to digital architecture, protocol development, and cloud connectivity - enabling industry-leading, low-power, long-range wireless solutions.\nYou will be part of a highly collaborative and innovative environment, contributing to the next generation of LoRa and LoRaWAN system architecture, shaping the future of connected devices across industrial, infrastructure, and consumer markets.\nJob Summary:\nThe Senior Staff Digital Design Engineer is responsible for leading the design and development of digital subsystems within complex mixed-signal ICs, from initial concept through to lab validation.\nThis role plays a key part in defining digital architectures, implementing high-performance and low-power designs, and collaborating cross-functionally to ensure successful product development and production readiness. The position requires strong technical expertise, problem-solving capability, and the ability to contribute to innovation and continuous improvement within the design team.\nResponsibilities:\nDesign and implement digital subsystems, including CPU-based architectures, FSMs, interconnects, and peripherals (e.g. I2C, SPI, analog controls) (40%)\nDefine and architect digital system blocks, contributing to system-level design decisions and trade-offs (10%)\nCollaborate with analog design teams to define interfaces and ensure seamless mixed-signal integration (10%)\nDebug and analyse RTL and verification issues, identifying root causes and driving resolution (10%)\nSupport block-level and chip-level verification activities in collaboration with verification teams (10%)\nContribute to lab validation, product qualification, and cross-functional engineering efforts with Validation, Test, and Product teams (10%)\nDrive continuous improvement of design methodologies, tools, and overall design quality (10%)\nMinimum Qualifications:\nBachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field\n8+ years of experience in digital IC design, preferably within mixed-signal environments\nStrong knowledge of digital IC development, including frontend-to-backend flow, timing closure, and low-power design techniques\nExperience with MCU-based architectures (e.g. ARM, RISC-V, STM32) and digital microarchitecture\nProficiency in SystemVerilog, Verilog, or VHDL, along with scripting languages such as Python, Tcl, or Perl\nExperience with industry-standard EDA tools (e.g. Synopsys, Cadence, Siemens)\nUnderstanding of verification methodologies (e.g. UVM/OVM, formal verification)\nFamiliarity with standard hardware interfaces (e.g. I2C, I3C, SPI, MIPI)\nStrong analytical, problem-solving, and communication skills\nAbility to work independently while collaborating effectively within cross-functional teams\nDesired Qualifications:\nExperience with wireless communication systems (e.g. BLE, IEEE 802.15.4)\nKnowledge of transceiver architectures, modulation/demodulation, and signal processing\nExposure to cryptographic block design\nExperience with FPGA design and FPGA-based system validation\nFamiliarity with version control and collaborative development tools (e.g. Git)\nBroader understanding of system-level design, including embedded firmware, analog interaction, and modelling\nCareer Growth Philosophy:\nAt Semtech, we believe that innovation starts with people. We are committed to empowering professional development through mentorship, continuous learning resources, and a collaborative, idea-rich engineering environment.\nOur pay-for-performance culture rewards initiative, encourages growth, and recognises meaningful technical and leadership contributions. Engineers in this role are supported to expand their influence, deepen their expertise, and shape both their career progression and the future of Semtech’s digital engineering capabilities.\nAdditional Notes:\nThe intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job.\nIncumbents may be required to perform job-related tasks other than those specifically included in this description.\nAll duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities.\nA reasonable estimate of the pay range for this position is 112,500 CHF - 150,000 CHF. There are several factors taken into consideration in determining base salary, including but not limited to: job-related qualifications, skills, education and experience, as well as job location and the value of other elements of an employee’s total compensation package.","description_format":"text","description_chars":4863,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Continuous learning","Professional development"],"hiring_locations":[{"name":"Switzerland","iso":"CH","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":[],"lifecycle":[{"event":"open","at":"2026-10-04T18:22:40Z"}],"visa":[],"liveness":{"score":12,"band":"cold","label":"Long shot","p_open":1,"p_active":0.436,"p_room":0.28,"age_days":73,"expected_fill_days":24,"reasons":["conf:6","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-16T05:45:00Z"},"pay":{"stated_usd_annual":180477,"is_top_pay":false},"html_url":"https://alion.io/job/semtech-senior-staff-digital-design-engineer","json_url":"https://alion.io/job/semtech-senior-staff-digital-design-engineer.json","meta":{"generated_at":"2026-10-16T20:55:10Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":1631,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-17T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":58922},"rest":"https://alion.io/mcp/rest/get_company?id=58922"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsemtech-senior-staff-digital-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsemtech-senior-staff-digital-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsemtech-senior-staff-digital-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/semtech-senior-staff-digital-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsemtech-senior-staff-digital-design-engineer"}]}