{"id":56096,"url":"https://alion.io/job/sifive-power-management-design-engineer","title":"Power Management Design Engineer","company":{"id":58802,"name":"SiFive","domain":"sifive.com","url":"https://alion.io/company/sifive","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":95,"open_postings":21,"ghost_share":0,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":76,"computed_at":"2026-10-17T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States","Boston, United States","Austin, United States","Cambridge, United Kingdom"],"countries":["US","GB"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":205740,"max":251460,"currency":"USD","period":"year","gross":null,"usd_annual":251460},"salary_estimate":null,"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Machine Learning","optional":false},{"name":"Synopsys SpyGlass","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"Bluespec","optional":true},{"name":"Chisel","optional":true},{"name":"Confluence","optional":true},{"name":"Git","optional":true},{"name":"GitHub","optional":true},{"name":"Jira","optional":true},{"name":"Scala","optional":true}],"status":"live","first_seen_at":"2026-08-08T00:00:00Z","employer_posted_date":"2026-08-08","last_verified_at":"2026-10-17T20:22:00Z","board_verified":true,"closed_at":null,"days_open":70,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":70},"description":"About SiFive\nAs the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.\nAt SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.\nOur constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.\nAre you ready?\nTo learn more about SiFive’s phenomenal success and to see why we have won theGSA’s prestigious Most Respected Private Company Award(for the fourth time!), check out ourwebsite andGlassdoor pages.\nJob Description:\nThe Role:\nSiFive is looking for hardware engineers who are passionate about designing industry-leading CPU and interconnect IP to help drive the tidal wave of adoption of RISC-V as the architecture of choice for SOC designs across a broad variety of vertical applications. We’re creating massively customizable IP and improving time-to-market by designing hardware as highly-configurable generators. We're leveraging technology and ideas from the software industry to execute hardware design with the agility of software development.\nAs a Power-Management/Reset/Clock Micro-Architect and RTL Design Engineer at SiFive, you will be part of a team of engineers who are passionate about designing industry-leading CPU cores and subsystems based on the revolutionary open RISC-V and TileLink architectures. You will create power management, reset, and clocking solutions that provide the central nervous system for cutting-edge RISC-V CPU and SoC IP designs. You will work in a fast-paced dynamic environment to bring new hardware IP to market quickly, with high quality and exceptional performance - delivering hardware at the speed of software!\nJoin us, and surf the RISC-V wave with SiFive!\nResponsibilities:\nWork with the architecture team to understand and define power management requirements.\n\nArchitect, design and implement core clocking, reset and power management solutions.\n\nMicroarchitecture development and specification. Ensure that knowledge is shared via clear documentation and participation in a culture of collaborative design.\n\nPerform initial sandbox verification, and work with the design verification team to create and execute thorough verification test plans.\n\nWork with a physical implementation team to implement and optimise physical design to meet frequency, area, power goals.\n\nWork with a software team to enable and optimise power management features.\n\nRequirements:\n3+ years of recent industry experience in CPU and SoC clocking, reset, and power-management logic designs.\n\nExperience in high-performance, energy-efficient CPU and SoC designs.\n\nExpertise in CPU and SoC clocking, reset design, and power management, including:\nReset control and design strategies: Clock distribution, dynamic clocking, clock gating, and clock boundary crossing strategies\n\nPower state definition and management and Power Management Unit (PMU) design\n\nDynamic and static power reduction techniques, including retention and power-up/down sequencing\n\nDynamic voltage and frequency scaling (DVFS) and Di/dt mitigation strategies\n\nUnderstanding of DFT, MBIST, Debug and Error handling in CPU designs\n\nPower-aware simulation\n\nProficiency with hardware (RTL) design in Verilog, SystemVerilog, or VDHL.\n\nGood understanding of various RTL quality checks like Lint, CDC, RDC etc. Hands-on experience with Spyglass is a plus.\n\nAttention to detail and a focus on high-quality design.\n\nAbility to work well with others and a belief that engineering is a team sport.\n\nKnowledge of at least one object-oriented and/or functional programming language.\n\nBackground of successful CPU or SoC development from architecture through tapeout.\n\nBS/MS degree in EE, CE, CS or a related technical discipline, or equivalent experience.\n\nNice to have\nExperience with AMBA Interconnect Protocols, such as AXI, AHB, and APB.\n\nExperience with AMBA Low Power Protocol Interface, including P-channel and Q-channel protocols.\n\nExperience with Scala/Chisel, Bluespec, or some other language/DSL for expressing configurable hardware via software\n\nKnowledge of RISC-V architecture\n\nExperience with Git/Github, Jira, Confluence\n\nSiFive is proud to be an equal employment opportunity workplace. We offer a competitive compensation package that includes flexible paid time off, health, vision and dental benefits, 401(k) plan, employee stock option program, and much more. If you yearn to be challenged and wish to work in an environment where the boundaries of your creativity and skills will be tested, then SiFive is the place for you.\nPay & Benefits\nConsistent with SiFive values and applicable law, we provide the following information to promote pay transparency and equity. We have a market-based pay structure which varies by location. Please note that the base pay range is a guideline, and our compensation range reflects the cost of labor in the U.S. geographic market based on the location of the role. Pay within these ranges varies and depends on job-related knowledge, skills, and relevant work experience.\nFor candidates who receive and offer, the starting salary will vary based on various factors including, but not limited to, such qualifications as, skill level, competencies, and work location. The range provided may represent a candidate range and may not reflect the full range for an individual tenured employee.\nBase Pay Range\n$205,740.00-$251,460.00In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!\n Additional Information:\nThis position requires a successful background and reference checks and satisfactory proof of your right to work in\nUnited States of AmericaAny offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.\nSiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.\nAs an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.\nCalifornia residents: please see our job candidate notice for more information on how we handle your personal information and your privacy rights: Privacy Policy Document.","description_format":"text","description_chars":7552,"description_truncated":false,"requirements":{"experience_years_min":3,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Equity","Retirement plans"],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Energy Management","Processors, MCUs & AI Chips","Semiconductor IP & Chip Design Services"],"lifecycle":[],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 6","filings_12m":6,"filings_prev_12m":10,"green_card_filings_12m":0,"median_offered_wage_usd":162500,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":3}],"liveness":{"score":42,"band":"fade","label":"Fading","p_open":1,"p_active":0.707,"p_room":0.6,"age_days":70,"expected_fill_days":76,"reasons":["conf:3","velocity","win:late","crowd:brand"],"computed_at":"2026-10-17T05:46:00Z"},"pay":{"stated_usd_annual":251460,"is_top_pay":true},"html_url":"https://alion.io/job/sifive-power-management-design-engineer","json_url":"https://alion.io/job/sifive-power-management-design-engineer.json","meta":{"generated_at":"2026-10-17T20:55:08Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":5226,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-18T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":58802},"rest":"https://alion.io/mcp/rest/get_company?id=58802"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsifive-power-management-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsifive-power-management-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsifive-power-management-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/sifive-power-management-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsifive-power-management-design-engineer"}]}