{"id":1452201,"url":"https://alion.io/job/silicon-labs-design-verification-engineer-ii","title":"Design Verification Engineer II","company":{"id":44123,"name":"Silicon Labs","domain":"silabs.com","url":"https://alion.io/company/silabs","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":77,"open_postings":16,"ghost_share":0,"stale_share":0.938,"repost_share":0,"time_to_fill_p50_days":40,"computed_at":"2026-10-15T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Singapore"],"countries":["SG"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":42000,"max_usd":88000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":17},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"TCL Scripting","optional":false},{"name":"UVM","optional":false}],"status":"live","first_seen_at":"2026-09-29T07:59:48Z","employer_posted_date":"2026-09-29","last_verified_at":"2026-10-14T14:04:30Z","board_verified":true,"closed_at":null,"days_open":16,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":16},"description":"Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more atwww.silabs.com.\nAbout the team\nThe IoT Digital Design team is a state-of-art IC design team focused on producing world class Wireless MCU SoCs. The architecture specification, design, verification, emulation, and implementation of the Wireless MCU SoCs is the responsibility of the IoT Digital team. These SoCs include an embedded CPU system with analog and digital peripherals, advanced security, advanced power management, and best in class radios to support a wide range of wireless IoT applications and standards. We strive to provide best in class technology solutions through innovation in custom RISC-V Cores and AI/ML components.\nResponsibilities\nDevelop and execute verification plans for SoC/IP blocks and mixed-signal designs.\nBuild and maintain SystemVerilog/UVM-based testbenches.\nCreate directed and constrained-random test cases.\nDrive functional coverage closure, assertions, and regression analysis.\nDebug RTL and verification failures across simulation/emulation environments.\nCollaborate closely with:\nRTL designers\narchitecture teams\nfirmware/software teams\nvalidation engineers\nImprove verification methodologies, automation, and CI flows.\nSupport pre-silicon and occasionally post-silicon debug activities.\nMentor junior engineers and contribute to verification strategy.\nQualifications/Skills you'll need:\nBS/MS in Electrical or Computer Engineering\n5-10+ years of verification experience\nExperience with:\nWireless SoCs\nMCU subsystems\nAMBA/AXI/APB protocols\nembedded systems\nlow-power IoT silicon\nTechnical Knowledge and Skill Requirements\nSystemVerilog\nUVM/OVM\nRTL and GLS simulation/debug\nFunctional coverage\nAssertions (SVA)\nPython/Perl/TCL scripting\nSoC/IP verification\nLow-power verification concepts\nCDC/RDC verification\nMixed signal / AMS verification \nBenefits & Perks:\nNot only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.\nMedical and dental insurance coverage including spouse and child(ren)\nBi yearly health screening and flu vaccination\nOffice location is above Tai Seng MRT station\nSilicon Labs is an equal opportunity employer and values the diversity of our employees. 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