{"id":3331650,"url":"https://alion.io/job/silicon-labs-lead-engineer-cad-physical-verification","title":"Lead Engineer - CAD Physical Verification","company":{"id":44123,"name":"Silicon Labs","domain":"silabs.com","url":"https://alion.io/company/silabs","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":77,"open_postings":16,"ghost_share":0,"stale_share":0.938,"repost_share":0,"time_to_fill_p50_days":40,"computed_at":"2026-10-28T05:59:10Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"lead","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hyderabad, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":18000,"max_usd":46000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":14},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Cadence Pegasus","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-10-27T12:18:50Z","employer_posted_date":"2026-10-27","last_verified_at":"2026-10-28T20:37:02Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more atwww.silabs.com.\nMeet the Team\nAs part of central CAD group, CAD Physical Verification (PV) team is responsible for supporting design and layout teams during chip development by debugging PV related queries, developing and supporting various PV decks like DRC, Antenna, Dummy fill, LVS and extraction.In addition, the team collaborates and collects specs from other teams to code decks like PERC, Float, Density, XOR from scratch. The team is also responsible for developing and automating various flows and methodologies to improve verification quality and optimize performance.\nResponsibilities\nSupport design and layout teams to resolve any PV related issues during design development cycle\nDevelopment and QA of various physical verification rule decks like DRC, Dummy fill, Antenna and other custom decks\nConduct and drive impact analysis meetings with stakeholders for deck updates\nCollaborate closely with CAD, ESD, Design, Layout, Packaging and foundry teams to obtain requirements for deck development.\nConduct code reviews and create custom QA testcases to validate the quality of rule decks.\nDevelop and maintain PV flows and methodologies to improve quality and performance\nPerform new tool/feature evaluations and benchmarks.\nWork closely with external vendors to report and track bugs in the software\nSkills you'll need:\n5+ years of related professional experience\nBachelor’s or Master’s degree in electrical engineering\nProficiency in developing and supporting DRC rule decks including custom rules in Calibre SVRF or similar languages\nExperience in coding LVS, extraction and PERC rule decks is a plus\nExperience working with design/layout engineers in debugging PV issues.\nKnowledge of using physical verification tools like PVS, Pegasus, Calibre RVE, Calibre DRV, Virtuoso layout editor etc\nProficiency in scripting languages like PERL/Python/Shell for developing custom scripts\nExcellent communication skills and experience in collaborating with different teams for collecting initial specs, deck development, support and leading deck impact analysis meetings.\nAbility to work independently, drive decision-making, detail oriented and documentation skills are critical.\nBenefits & Perks\nNot only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.\nEquity Rewards (RSUs) \nEmployee Stock Purchase Plan (ESPP) \nInsurance plans with Outpatient cover \nNational Pension Scheme (NPS) \nFlexible work policy \nChildcare support. \nSilicon Labs is an equal opportunity employer and values the diversity of our employees. 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