{"id":893951,"url":"https://alion.io/job/silicon-labs-manager-senior-manager-design-verification","title":"Manager / Senior Manager – Design Verification","company":{"id":44123,"name":"Silicon Labs","domain":"silabs.com","url":"https://alion.io/company/silabs","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":78,"open_postings":17,"ghost_share":0,"stale_share":0.882,"repost_share":0,"time_to_fill_p50_days":40,"computed_at":"2026-10-23T05:54:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hyderabad, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":17500,"max_usd":45000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":18},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Formal Verification","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-08-10T00:00:00Z","employer_posted_date":"2026-09-22","last_verified_at":"2026-10-21T07:46:41Z","board_verified":false,"closed_at":null,"days_open":74,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":74},"description":"Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more atwww.silabs.com.\nMeet the Team\nJoin a dynamic Design Verification team responsible for delivering robust IP and SoC solutions across multiple product programs. We work closely with Design, Architecture, Firmware, Validation, and Program Management teams across global locations to ensure high-quality silicon delivery. Collaboration, innovation, technical excellence, and continuous improvement define our culture, making this an exciting opportunity to lead, grow, and make a significant impact.\nAbout the Role\nWe are seeking an experienced Manager / Senior Manager - Design Verification to join our Silicon Engineering team in Hyderabad. In this role, you will lead and develop a high-performing verification team responsible for IP and SoC verification across multiple projects. \nYou will drive verification planning, execution, closure, and on-time delivery while providing strong technical and people leadership. You will also collaborate with cross-functional and global teams, improve verification methodologies and automation, and champion the adoption of advanced verification techniques, AI-assisted workflows, and industry best practices. \nThis is an excellent opportunity to lead complex verification programs, build scalable verification capabilities, and develop the next generation of engineering leaders.\nResponsibilities\nLead and develop a high-performing Design Verification team responsible for IP and SoC verification across multiple projects. \nDrive verification planning, execution, functional coverage closure, regression management, sign-off, and on-time delivery with high quality. \nProvide technical leadership in SystemVerilog, UVM, assertions, constrained-random verification, coverage-driven verification, and debug methodologies. \nManage project priorities, technical risks, resource allocation, and dependencies across multiple programs. \nCollaborate with Design, Architecture, Firmware, Validation, and Program Management teams across global sites. \nDefine and drive verification strategies for complex IPs, subsystems, and SoCs. \nDrive continuous improvements in verification methodologies, automation, regression efficiency, and reusable verification infrastructure. \nChampion innovation through the adoption of new verification techniques, tools, formal methods, AI-assisted workflows, and industry best practices. \nMentor engineers, develop technical leaders, and build a culture of engineering excellence, accountability, collaboration, and continuous learning. \nEstablish clear execution metrics, monitor project progress, identify risks early, and drive issues to closure. \nSupport hiring, performance management, career development, and organizational capability building for the verification team. \nRequirements\nB.E./B.Tech or M.E./M.Tech in Electrical Engineering, Computer Engineering, VLSI, or a related field. \n10-15 years of experience in Design Verification, with strong expertise in IP, subsystem, and SoC verification. \nProven experience leading and developing Design Verification teams in a multi-site development environment. \nStrong hands-on expertise in SystemVerilog, UVM, assertions, constrained-random verification, functional coverage, and regression management. \nDemonstrated success in delivering multiple complex verification projects from planning through sign-off. \nStrong understanding of verification planning, testbench architecture, coverage closure, debug methodologies, and verification metrics. \nExperience driving verification methodology, automation, reuse, and productivity improvements across teams. \nExcellent leadership, problem-solving, communication, stakeholder management, and cross-functional collaboration skills. \nPreferred Qualifications\nExperience leading verification for complex SoCs, subsystems, processors, connectivity, mixed-signal, or low-power designs. \nExperience with formal verification, emulation, FPGA prototyping, performance verification, or hardware-software co-verification. \nKnowledge of low-power verification methodologies, including UPF-based verification and multi-power-domain designs. \nExperience developing reusable UVM environments, verification IP, automation frameworks, and scalable regression infrastructure. \nExposure to AI-assisted verification, data analytics, advanced debug tools, or scripting languages such as Python, Perl, or Tcl. \n\"Experience with artificial intelligence (AI) powered tools and technologies used to enhance productivity, analysis, and decision-making\"\nBenefits & Perks:\nNot only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.\nEquity Rewards (RSUs) \nInsurance plans with Outpatient cover \nNational Pension Scheme (NPS) \nFlexible work policy \nChildcare support \nSilicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.","description_format":"text","description_chars":5816,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":["Continuous learning","Equity","Flexible schedule"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Embedded Software & RTOS","Processors, MCUs & AI Chips","RF & Wireless Hardware","IoT Platforms & Solutions"],"lifecycle":[{"event":"open","at":"2026-09-14T08:48:40Z"}],"visa":[],"liveness":{"score":20,"band":"cold","label":"Long shot","p_open":1,"p_active":0.454,"p_room":0.45,"age_days":74,"expected_fill_days":40,"reasons":["conf:46","stale_co","velocity","win:tail"],"computed_at":"2026-10-23T05:54:15Z"},"pay":null,"html_url":"https://alion.io/job/silicon-labs-manager-senior-manager-design-verification","json_url":"https://alion.io/job/silicon-labs-manager-senior-manager-design-verification.json","meta":{"generated_at":"2026-10-23T18:44:56Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":55,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-24T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":44123},"rest":"https://alion.io/mcp/rest/get_company?id=44123"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsilicon-labs-manager-senior-manager-design-verification"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsilicon-labs-manager-senior-manager-design-verification"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsilicon-labs-manager-senior-manager-design-verification"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/silicon-labs-manager-senior-manager-design-verification\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsilicon-labs-manager-senior-manager-design-verification"}]}