{"id":1770830,"url":"https://alion.io/job/silicon-labs-senior-design-verification-engineer","title":"Senior Design Verification Engineer","company":{"id":44123,"name":"Silicon Labs","domain":"silabs.com","url":"https://alion.io/company/silabs","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":77,"open_postings":16,"ghost_share":0,"stale_share":0.938,"repost_share":0,"time_to_fill_p50_days":40,"computed_at":"2026-10-15T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Austin, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":124600,"max":231400,"currency":"USD","period":"year","gross":null,"usd_annual":231400},"salary_estimate":null,"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"C++","optional":true},{"name":"MATLAB","optional":true},{"name":"Wi-Fi","optional":true},{"name":"Zigbee","optional":true}],"status":"live","first_seen_at":"2026-10-02T00:00:00Z","employer_posted_date":"2026-10-02","last_verified_at":"2026-10-14T14:04:30Z","board_verified":true,"closed_at":null,"days_open":13,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":13},"description":"Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more atwww.silabs.com.\nSenior Design Verification Engineer\nAustin, Texas\nMeet the team\nThe Wireless PHYMAC team is responsible for designing the digital components of Silicon Labs’ low power energy-efficient wireless products. Our team focuses on building efficient, high-performance digital systems that enable wireless connectivity across applications such as smart home, industrial IoT, and smart cities. The team operates in a highly collaborative and cross-functional environment, working closely with system architects, analog/RF designers, firmware engineers, and product teams to deliver robust and scalable wireless solutions. By working at the intersection of digital design and wireless systems, the team plays a critical role in advancing the future of connected devices.\nAbout the Role\nAs a Senior Design Verification Engineer, you will be responsible for ensuring the functional correctness and performance of digital modem designs used in Silicon Labs’ low-power wireless products. You will work closely with design, architecture, and system teams to develop verification strategies, build robust test environments, and debug complex issues across the PHY/MAC layers. This role offers the opportunity to contribute throughout the product lifecycle-from early design through silicon bring-up-while working on cutting-edge wireless technologies that power next-generation connected devices.\nResponsibilities\nDefine and execute verification strategies for digital modem designs across key wireless use cases \nDevelop and maintain scalable verification environments using SystemVerilog/UVM or similar methodologies \nCreate test plans, test benches, and stimuli to achieve high functional and coverage closure \nDebug and analyze design issues, working closely with design and architecture teams to resolve them \nTrack and drive functional and code coverage to ensure verification completeness \nCollaborate cross-functionally with firmware, validation, and system teams to ensure correct system behavior \nSupport silicon bring-up and correlate pre-silicon verification with post-silicon results \nContinuously improve verification methodologies, tools, and automation workflows \nMinimum Qualifications\nBSEE/CE or a related field \nSolid understanding of digital design fundamentals and verification concepts \n3-6 years of experience in digital design verification, with a focus on modem or wireless PHY designs preferred \nExperience with SystemVerilog and UVM or similar verification methodologies \nStrong debugging skills with experience analyzing simulation results and identifying root causes \nFamiliarity with scripting languages such as Python or Perl for automation \nBasic understanding of wireless communication systems or digital signal processing concepts \nStrong problem-solving skills and ability to work effectively in a collaborative team environment \nPreferred Qualifications\nExperience verifying wireless standards such as BLE, Wi-Fi, Zigbee, or similar technologies \nExperience with advanced verification techniques such as constrained-random, coverage-driven verification, and SystemVerilog assertions (SVA) \nFamiliarity with C/C++ or MATLAB for algorithm modeling and reference model development \nExperience with mixed-signal or system-level verification, including co-simulation with analog/RF components \nExposure to post-silicon validation, lab bring-up, and correlation with pre-silicon results \nExperience with low-power design verification and power-aware methodologies \nBenefits & Perks\nYou can look forward to the following benefits:\nGreat medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental & vision plans\nFlexible vacation plan.\nHighly competitive salary\n401k plan with match and Roth plan option\nEquity rewards (RSUs)\nLife/AD&D and disability coverage\nFlexible spending accounts\nAdoption assistance\nBack-Up childcare\nAdditional benefit options (Commuter benefits, Legal benefits, Pet insurance)\n3 paid volunteer days per year\nCharitable contribution match\nTuition reimbursement\nMonthly wellness offerings\nFree snacks\nMonthly company updates with our CEO\n#LI AA1\nThe annualized base pay range for this role is expected to be between $124,600 - $231,400 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.Silicon Labs is an equal opportunity employer and values the diversity of our employees. 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