{"id":3481383,"url":"https://alion.io/job/sitime-principal-fpga-design-engineer","title":"Principal FPGA Design Engineer I 1486","company":{"id":58930,"name":"SiTime","domain":"sitime.com","url":"https://alion.io/company/sitime","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":148320,"max":203940,"currency":"USD","period":"year","gross":null,"usd_annual":203940},"salary_estimate":null,"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Python","optional":false},{"name":"Siemens ModelSim","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"Xilinx Vivado","optional":false}],"status":"live","first_seen_at":"2026-10-16T01:20:35Z","employer_posted_date":"2026-11-12","last_verified_at":"2026-11-13T19:02:09Z","board_verified":true,"closed_at":null,"days_open":28,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":28},"description":"About SiTime\nSiTime is the Precision Timing company. \nTiming is the heartbeat of all electronics, ensuring performance, resilience and scalability. For decades, quartz devices, non-silicon technology, have kept systems in sync, but they struggle in harsher, more demanding environments. MEMS-based Precision Timing delivers greater accuracy, smaller size and resilience. Today, MEMS timing powers over 400 applications, including high-growth ones in AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT.\nOur semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. With more than 4 billion devices shipped, SiTime is changing the timing industry. For more information, visit www.sitime.com\nJob Summary\nWe are seeking a seasoned FPGA Architect with a minimum of 10 years of experience to lead the design and development of FPGA-based platforms that support internal testing and validation of our precision, high-performance MEMS timing products. This role is critical to developing robust infrastructure for frequency measurement, low phase noise and low jitter characterization, production, and system-level validation\n Responsibilities:\nArchitect and implement scalable FPGA solutions for internal hardware platforms used in MEMS timing product testing\nLead cross-functional technical initiatives involving CMOS design, MEMS design, systems and test engineering, validation, and production teams\nDefine and drive system-level requirements, ensuring alignment across hardware, software, and test domains\nOwn the full FPGA lifecycle: architecture, RTL design, simulation, synthesis, timing closure, and bring-up\nDevelop reusable IP blocks and maintain a modular, maintainable FPGA infrastructure\nChampion design reviews, documentation standards, and continuous improvement practices\nProvide technical leadership and mentorship to junior engineers and influence strategic direction across multiple programs\nAct as a key technical liaison between engineering, product, and operations teams to ensure seamless integration and execution\n Qualifications & Requirements :\nMS in Electrical Engineering, Computer Engineering, or related field\n10+ years of hands-on experience in FPGA architecture and development (Xilinx, Intel/Altera, or similar)\nDeep expertise in Verilog/VHDL, simulation tools (ModelSim, Vivado, etc.), and scripting (Python, TCL)\nProven track record in designing systems with low jitter, low phase noise, and high signal fidelity\nStrong understanding of timing analysis, clock domain crossing, and high-speed interfaces (PCIe, DDR, SERDES)\nExperience with lab bring-up, debugging tools (logic analyzers, oscilloscopes), and test automation\nDemonstrated leadership in driving cross-functional initiatives and delivering complex technical programs\nExcellent communication, collaboration, and stakeholder management skills \nPreferred Qualifications\nExperience in MEMS or timing product domains\nFamiliarity with hardware/software co-design and embedded systems\nExposure to production test environments and ATE systems\nExperience presenting technical strategies and outcomes to executive leadership\n At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent. \nThe annual base salary range for this role is $148,320.00 - $203,940.00. In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals-reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company’s future growth and success.\nBenefits offered: 401k plan, health and wellness that includes medical, dental, vision, life, parental leave, legal services, and time off plans.\nSiTime is an Equal Opportunity Employer. We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics, including race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, pregnancy, political affiliation, protected veteran status, protected genetic information, or marital status or other characteristics protected by law. SiTime participates in the E-Verify program.\nLearn More about SiTime: Review the Get to Know SiTime section of our career page to explore our culture, values, and what makes us unique. \nInnovation on Top - Philosophies of Innovation with Rajesh Vashist\nFabrication Knowledge - An Interview with Rajesh Vashist\n SiTime Corporation - YouTube\nPay Range\n$148,320—$203,940 USD","description_format":"text","description_chars":4790,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[]},"benefits":["401k plan","Equity","Parental leave"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Passive Components & Connectors","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-10-29T20:14:17Z"}],"visa":[{"country":"US","licensed_sponsor":true,"adverts_offering_sponsorship_24m":0,"sanctioned_now":false,"evidence":"H-1B filings in 12 months: 19 · green card filings: 3","filings_12m":19,"filings_prev_12m":10,"green_card_filings_12m":3,"median_offered_wage_usd":140455,"route":null,"cap_exempt":false,"checked_at":"2026-11-12T07:36:15+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":5}],"liveness":{"score":40,"band":"fade","label":"Fading","p_open":1,"p_active":0.731,"p_room":0.55,"age_days":27,"expected_fill_days":20,"reasons":["conf:0","velocity","win:tail","comp:brand"],"computed_at":"2026-11-12T10:38:37Z"},"pay":{"stated_usd_annual":203940,"is_top_pay":false},"html_url":"https://alion.io/job/sitime-principal-fpga-design-engineer","json_url":"https://alion.io/job/sitime-principal-fpga-design-engineer.json","meta":{"generated_at":"2026-11-13T19:30:48Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":38906,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-14T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":58930},"rest":"https://alion.io/mcp/rest/get_company?id=58930"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsitime-principal-fpga-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"free","price":{"credits":0,"usd":0},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsitime-principal-fpga-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsitime-principal-fpga-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/sitime-principal-fpga-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsitime-principal-fpga-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3481383}},{"tool":"search_jobs","arguments":{"company":"sitime.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3481383},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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