{"id":2798832,"url":"https://alion.io/job/stmicroelectronics-senior-digital-verification-engineer","title":"Senior Digital Verification engineer","company":{"id":41463,"name":"STMicroelectronics","domain":"st.com","url":"https://alion.io/company/st","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Eightfold","truth_index":{"grade":"B","score":75,"open_postings":42,"ghost_share":0,"stale_share":0.81,"repost_share":0,"time_to_fill_p50_days":64,"computed_at":"2026-10-17T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Naples, Italy"],"countries":["IT"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":50000,"max_usd":92000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":16},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Xcelium","optional":false},{"name":"Git","optional":false},{"name":"Linux","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Synopsys VCS","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Unix","optional":false},{"name":"UVM","optional":false},{"name":"Formal Verification","optional":true},{"name":"Machine Learning","optional":true},{"name":"Stata","optional":true}],"status":"live","first_seen_at":"2026-03-25T14:03:59Z","employer_posted_date":"2026-07-31","last_verified_at":"2026-10-18T08:19:21Z","board_verified":true,"closed_at":null,"days_open":206,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":206},"description":"LA NOSTRA STORIA\nNoi di ST crediamo nel potere della tecnologia di guidare l’innovazione e avere un impatto positivo sulle persone, sulle imprese e sulla società. Siamo un'azienda globale di semiconduttori e la nostra tecnologia avanzata e i nostri chip costituiscono la parte nascosta del mondo in cui viviamo oggi.\nEntrando in ST farai parte di un'azienda di oltre 115 nazionalità e presente in 40 paesi, con oltre 50.000 creatori di tecnologia in tutto il mondo!\nLo sviluppo di tecnologie richiede più del solo talento: siamo infatti alla ricerca di persone straordinarie che comprendano la collaborazione e il rispetto. Persone con passione e il desiderio di rompere lo status quo, guidare l'innovazione e sbloccare il proprio potenziale. Intraprendi un viaggio con noi, dove puoi innovare per un futuro che vogliamo rendere più intelligente e più verde, in modo responsabile e sostenibile. La nostra tecnologia inizia con te..\nRole\nWe are looking for a Digital Verification Engineer - SoC to join our MDRF-RFOC-DVCC Digital Verification team in Naples, dedicated to the digital verification of complex SoC/IP for automotive / industrial applications.\nThe selected candidate will work on SystemVerilog UVM testbenches, firmware / drivers in C, and Python scripts for automation, contributing to the entire verification cycle: from strategy definition to environment creation, up to coverage analysis and debug.\nWithin the team we also use AI-assisted tools and methodologies to accelerate development, debug, and results analysis, and we expect the candidate to be curious and interested in leveraging these technologies in day-to-day activities.\nMain Responsibilities\nDefine, in collaboration with architects and designers, the verification strategy at IP and/or SoC level.\nDevelop and maintain UVM testbenches in SystemVerilog (environment, agent, sequencer, driver, monitor, scoreboard).\nWrite and integrate C tests for subsystem and SoC verification in simulation and/or emulation environments.\nDevelop Python scripts (and, when needed, bash/Tcl/Perl) for:regression automation,\npost-processing of results,\ncoverage analysis and report generation.\n\nPerform functional debug of failing test cases, interacting with the design (RTL) team and system architects.\nRun and debug gate-level simulations with SDF back-annotation, analyzing timing-related issues and collaborating with design and implementation teams to identify and resolve problems.\nAnalyze and manage functional coverage and code coverage, proposing new tests or testbench improvements to meet quality targets.\nUse AI-assisted tools and workflows for:generation and review of testbench code and scripts,\nlog analysis,\ndebug acceleration.\n\nContribute to the continuous improvement of verification flows (methodologies, common libraries, guidelines, best practices).\nProduce clear and structured documentation for:verification specifications,\ntestbench architecture,\ntest plans,\nkey results.\n\nTechnical Requirements Mandatory (must-have)\nDegree in Electronic Engineering, Computer Engineering/Science, Physics with an electronics focus, or related disciplines.\nSolid knowledge of digital verification of integrated circuits (RTL concepts, testbench, stimuli, checkers, coverage).\nHands-on experience with SystemVerilog and UVM methodology:development of UVM components (sequencer, driver, monitor, scoreboard),\nenvironment configuration,\nsequence and virtual sequence management.\n\nGood command of the C language for verification-oriented test/firmware driver development.\nExperience with Python for scripting and automation.\nGood knowledge and practical use of the Unix/Linux environment (shell, file system, batch jobs, compilation, basic scripting).\nFamiliarity with major digital simulators (e.g. Cadence Xcelium, Synopsys VCS, Siemens Questa).\nBasic knowledge of version control flows (Git, SVN, DesignSync).\nGood command of written and spoken English.\n5-8 years of experience in the role\nDesirable (nice-to-have)\nExperience with SoC/IP verification (AMBA/AXI/APB/AHB buses, memory interfaces, peripherals, interrupt controllers, DMA, etc.).\nBasic knowledge of machine learning / AI and use of AI tools for:code generation,\nlog analysis,\ntest and scenario creation.\n\n Knowledge of formal verification techniques (e.g. property checking, assertion-based verification) and familiarity with formal tools.\nExperience in ISO 26262 environments.\nKnowledge of other scripting languages (bash, Tcl, Perl) and related EDA tools (lint, CDC, STA) is a plus.\nPersonal Skills\nAnalytical mindset and strong problem-solving attitude.\nAttention to detail and strong product quality orientation.\nAbility to work in cross-functional teams (design, architecture, emulation, firmware).\nProactivity in proposing flow improvements and automation.\nWillingness to learn new technologies, particularly AI tools and methodologies applied to engineering.\nGood communication and technical documentation skills.\nST è orgogliosa di essere una delle 17 aziende certificate come Top Employer Globale 2025 e la prima e unica azienda di semiconduttori a raggiungere questa distinzione. ST è stata riconosciuta in questa classifica grazie al suo approccio di miglioramento continuo e si distingue particolarmente nelle aree di etica e integrità, scopo e valori, organizzazione e cambiamento, strategia aziendale e performance.\nIn ST, ci impegniamo a promuovere un ambiente di lavoro diversificato e inclusivo, e abbiamo tolleranza zero per la discriminazione. Miriamo a reclutare e mantenere una forza lavoro diversificata che rifletta le società intorno a noi. Ci sforziamo per l'equità nello sviluppo della carriera, nelle opportunità di carriera e nella remunerazione equa. Incoraggiamo i candidati che potrebbero non soddisfare tutti i requisiti a presentare domanda, poiché apprezziamo le prospettive diverse e offriamo opportunità di crescita e apprendimento. La diversità, l'equità e l'inclusione (DEI) sono intrecciate nella nostra cultura aziendale. La nostra visione DEI è: \"In ST, puoi essere la versione autentica di te stesso\".\nPer saperne di più visita il sito: st.com/careers","description_format":"text","description_chars":6126,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[{"language":"English","level":"All levels","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Sensors & Transducers","Semiconductor Manufacturing","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-10-18T01:43:54Z"}],"visa":[],"liveness":{"score":11,"band":"cold","label":"Long shot","p_open":1,"p_active":0.404,"p_room":0.28,"age_days":206,"expected_fill_days":51,"reasons":["conf:2","win:tail","crowd:brand"],"computed_at":"2026-10-18T10:31:24Z"},"pay":null,"html_url":"https://alion.io/job/stmicroelectronics-senior-digital-verification-engineer","json_url":"https://alion.io/job/stmicroelectronics-senior-digital-verification-engineer.json","meta":{"generated_at":"2026-10-18T10:31:24Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":15572,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-19T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":41463},"rest":"https://alion.io/mcp/rest/get_company?id=41463"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fstmicroelectronics-senior-digital-verification-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fstmicroelectronics-senior-digital-verification-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fstmicroelectronics-senior-digital-verification-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/stmicroelectronics-senior-digital-verification-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fstmicroelectronics-senior-digital-verification-engineer"}]}