{"id":1311470,"url":"https://alion.io/job/synopsys-applications-engineering-sr-engineer-18795-2","title":"Applications Engineering, Sr Engineer - 18795","company":{"id":39954,"name":"Synopsys","domain":"synopsys.com","url":"https://alion.io/company/synopsys-inc","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Avature","truth_index":{"grade":"A","score":100,"open_postings":99,"ghost_share":0.03,"stale_share":0,"repost_share":0.162,"time_to_fill_p50_days":7,"computed_at":"2026-09-28T05:45:00Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Sunnyvale, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":102000,"max_usd":196000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":2941},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Linux","optional":false},{"name":"Synopsys Verdi","optional":false},{"name":"TCL Scripting","optional":false}],"status":"live","first_seen_at":"2026-09-26T16:33:20Z","employer_posted_date":"2026-09-26","last_verified_at":"2026-09-26T19:50:00Z","board_verified":false,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"Job Description and Requirements\nWe Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are\nYou have spent the last couple of years learning how chips actually get designed, and you have realized that power is where the hard tradeoffs live. You understand that RTL power analysis is not just running a tool, it is about catching the decisions that will either save 20% power or blow the thermal budget before tape-out. You have debugged enough synthesis runs to know when a clock gating efficiency number looks wrong, and you are curious enough to figure out why.\nYou are comfortable working from established flows but smart enough to spot when something does not add up. When a customer asks why their switching power spiked after a design change, you do not guess, you reproduce it, check the waveforms, and either solve it or escalate it with enough context that the next person can pick it up without starting over. You write clear notes because you know that six months from now, someone else will need to understand what you found.\nYou are early in your career but not junior in your thinking. You ask good questions, you follow through, and you want to build real expertise in low-power design tooling at a company where that expertise actually matters.\nWhat You'll Be Doing\nExecute Prime Power RTL 2.0 logical flows for customer evaluations and internal projects, including library setup, RTL ingestion, SDC/FSDB correlation, synthesis, compute_power runs, and clock gating efficiency reporting\nSupport customers with routine flow setup, installation troubleshooting, and licensing questions, documenting results and issues for team review and escalation\nRun RTL power lint checks, summarize findings, and contribute testcase documentation, FAQ entries, and internal knowledge base updates\nReproduce customer-reported issues, diagnose routine problems, and escalate complex cases to senior AEs with clear context and supporting data\nPrepare evaluation collateral and technical summaries using established templates, ensuring accuracy and clarity for both internal teams and customer-facing deliverables\nCollaborate with sales, field support, and senior applications engineers on assigned accounts, contributing to support cases and evaluation timelines\nBuild working knowledge of Synopsys low-power design tools, RTL power estimation methodologies, and clock gating optimization techniques through hands-on customer and internal work\nThe Impact You Will Have\nEnable faster customer evaluations by executing reliable PPRTL flows and delivering clear, accurate technical collateral\nReduce escalation time by reproducing and documenting issues with enough detail that senior engineers and R&D can act immediately\nImprove team efficiency by contributing to internal documentation, FAQs, and knowledge base entries that make recurring problems easier to solve\nSupport customer adoption of Prime Power RTL 2.0 by helping them get flows running correctly the first time, reducing friction during critical evaluation windows\nStrengthen customer relationships by responding to routine questions quickly and thoroughly, building trust during the early stages of tool engagement\nContribute to product quality by surfacing real-world flow issues and testcases that inform R&D priorities and future releases\nHelp grow the team's collective expertise by capturing what you learn in ways that make the next person more effective\nWhat You'll Need\nBachelor's degree in Electrical Engineering, Computer Engineering, or related field, plus 2 years in semiconductor EDA, IC design, or applications/support; or Master's degree with relevant coursework or internship experience\nWorking understanding of RTL power concepts including switching power, internal power, leakage power, and clock gating fundamentals\nHands-on experience with Linux environments and Tcl scripting for automation or tool interaction\nAbility to follow established technical flows, reproduce results, and document findings clearly for both technical and non-technical audiences\nStrong written and verbal communication skills, you can explain what went wrong and what you tried without burying the key detail\nExposure to VCS, Verdi, low-power VLSI coursework, or basic SDC/UPF familiarity is a plus\nExperience with synthesis tools, waveform debugging, or customer-facing technical support is a plus\nWho You Are\nYou can take a 200-line Tcl script, run it, hit an error, and figure out whether it is a setup issue, a data issue, or something that needs to escalate, without spinning for hours\nYou write documentation that someone else can actually use, not just notes that make sense to you in the moment\nYou are comfortable saying \"I do not know, but I will find out\" and then actually finding out, whether that means reading the user guide, asking a senior engineer, or reproducing the issue three different ways\nYou can sit in a customer call, take notes while a design lead describes a power problem, and walk away with enough clarity to start working the issue without needing a second meeting\nYou stay organized when you are juggling three evaluations, two support cases, and a documentation update, and nothing falls through the cracks\nYou care about getting it right, not just getting it done, because you know that a sloppy power estimate can send a design team in the wrong direction for weeks\nThe Team You'll Be Part Of\nYour recruiter will share more about the team structure and mission during the interview process.\nRewards and Benefits\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.\n\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.\nIn addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.","description_format":"text","description_chars":6968,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Equity"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["EDA Software","Application Security","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-09-26T16:33:20Z"}],"liveness":{"score":88,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.878,"p_room":1,"age_days":1,"expected_fill_days":7,"reasons":["conf:33","velocity","win:early","comp:brand"],"computed_at":"2026-09-28T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/synopsys-applications-engineering-sr-engineer-18795-2","json_url":"https://alion.io/job/synopsys-applications-engineering-sr-engineer-18795-2.json","meta":{"generated_at":"2026-09-29T04:48:02Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":4604,"day_limit":5000,"remaining_today":396,"minute_limit":60,"resets_at":"2026-09-30T00:00:00Z"}}}