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Salary
≈ $19k – $44k per year (Estimated)
Location
In office (Ho Chi Minh City)
Seniority
Senior · 3+ years exp

Confirmed on the employer's own hiring board on Oct 10, 2026. First seen by Alion on Oct 10, 2026. Synopsys scores A on the Alion truth index.

Overview
Company
Impact
Profile match
Synopsys (NASDAQ: SNPS) is a premier American multinational technology corporation and the global leader in Electronic Design Automation (EDA), semiconductor intellectual property (IP), and software security and quality solutions. Headquartered in Sunnyvale, California, and led by CEO Sassine Ghazi, Synopsys operates on a B2B enterprise software, proprietary semiconductor IP licensing, and silicon engineering services model.

Job Description and Requirements

Senior Application Engineer - Physical Design

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, IP integration, and simulation and analysis, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

Job Description:

Provide technical support and engineering solutions for advanced Physical Design implementation flows, helping customers successfully deploy leading-edge EDA technologies.

Work closely with semiconductor customers to debug, optimize, and improve Physical Design methodologies across the design cycle.

Collaborate with worldwide Application Engineers and R&D teams to reproduce customer issues, analyze root causes, and deliver timely solutions.

Drive technical engagements involving floorplanning, placement, optimization, CTS, routing, timing closure, and PPA improvement.

Conduct technical presentations, customer trainings, methodology reviews, and knowledge-sharing sessions.

Support adoption of Synopsys Physical Design solutions including Fusion Compiler, ICC2, and related implementation technologies.

Key Skills & Experience:

  • 3+ years of experience in ASIC Physical Design, Design Implementation, or Application Engineering.
  • Strong hands-on experience with Synopsys Fusion Compiler and/or IC Compiler II (ICC2).
  • Solid understanding of Physical Design methodologies including Floorplanning, Placement, CTS, Routing, Timing Closure, DRC/LVS Closure, and PPA optimization.
  • Good knowledge of STA, extraction, physical verification, and signoff methodologies.
  • Experience with PrimeTime (PT), StarRC, IC Validator (ICV), DSO.ai, or AI-driven optimization technologies is a plus.
  • Familiarity with Tcl, Perl, Python, or Shell scripting.
  • Strong debugging, problem-solving, and customer-facing skills.
  • Excellent communication skills in English.
  • Passion for solving complex Physical Design challenges and enabling customer success.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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