{"id":2519462,"url":"https://alion.io/job/synopsys-asic-digital-design-sr-engineer-18334","title":"ASIC Digital Design, Sr. Engineer-18334","company":{"id":39954,"name":"Synopsys","domain":"synopsys.com","url":"https://alion.io/company/synopsys-inc","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Avature","truth_index":{"grade":"A","score":100,"open_postings":85,"ghost_share":0.035,"stale_share":0,"repost_share":0.176,"time_to_fill_p50_days":12,"computed_at":"2026-10-15T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Seongnam, South Korea"],"countries":["KR"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":79000,"max_usd":181000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1655},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Verilog","optional":false},{"name":"Git","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"Synopsys Verdi","optional":true}],"status":"live","first_seen_at":"2026-10-14T10:33:58Z","employer_posted_date":"2026-10-14","last_verified_at":"2026-10-15T13:07:24Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"Job Description and Requirements\nWe Are\nSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.\nPosition Overview\nWe are looking for a Staff Engineer to join our SerDes PHY IP firmware team and work alongside fellow engineers on PCS/PMA firmware for our next-generation SerDes PHY IP, supporting multiple protocols such as PCIe, Ethernet, and MIPI M-PHY. This is a senior individual-contributor role focused on hands-on firmware design and development, silicon bring-up, and customer issue resolution as a core member of the team.\nWhat You'll Be Doing\nDevelop firmware for next-generation SerDes PHY IP supporting multiple protocols, including PCIe, Ethernet, and MIPI M-PHY.\nDesign and maintain firmware for PHY startup, offset calibration, and adaptation flows.\nAnalyze and debug interactions between firmware, analog/mixed-signal front-end circuits, and digital PCS/PMA blocks.\nCollaborate closely with systems, analog design, digital design, verification, and lab teams during firmware development and debugging.\nSupport and enhance existing firmware applications and features.\nDevelop and maintain firmware development infrastructure and tools.\nDevelop and improve firmware documentation to enhance customer usability and support.\nInvestigate and resolve customer-reported firmware issues and failures.\nLead firmware integration, debugging, and silicon bring-up activities on assigned areas.\nContribute to improvements in firmware design methodologies and system-level architecture through collaboration with cross-functional teams.\nThe Impact You Will Have\nAdvance the development of high-performance firmware for next-generation technologies.\nEnhance the functionality and reliability of Synopsys' SerDes PHY IP products.\nOptimize system performance through post-silicon bring-up, characterization, and debugging activities.\nImprove customer satisfaction through robust firmware solutions and comprehensive documentation.\nDrive innovation in firmware design methodologies and system-level architecture.\nCollaborate with cross-functional teams to deliver integrated solutions that push the boundaries of technology.\nWhat You'll Need (Required)\nBachelor's, Master's, or PhD degree in Computer Engineering, Electrical Engineering, or a related field, or equivalent industry experience.\n8+ years of experience in a related field.\nUnderstanding of both digital logic and firmware/software development, with in-depth specialization in either.\nHands-on experience with assembly-level firmware development for embedded controllers or custom PHY sequencer ISAs.\nWorking knowledge of high-speed SerDes fundamentals and familiarity with at least one high-speed SerDes standard (e.g., PCIe, Ethernet, MIPI M-PHY, USB, or DisplayPort).\nExperience with structured firmware development, verification, and documentation processes.\nFamiliarity with embedded software toolchains, including cross-compilers, assemblers, and on-target debuggers.\nAbility to read and debug Verilog RTL (e.g., PHY FSM/sequencer RTL) to reason about firmware-hardware interactions.\nBusiness-level English communication skills, both written and verbal, to work effectively with global cross-functional teams and customers.\nPreferred Qualifications\nDeep expertise in PCIe, Ethernet, or MIPI M-PHY protocol layers.\nExperience with multi-protocol SerDes PHY architectures.\nRTL design or verification experience.\nScripting experience with Perl, Python, Bash, or Csh.\nSilicon bring-up and lab debugging experience, including waveform tools (e.g., Verdi/FSDB), scopes, or BER testers.\nExperience developing DSP microcode or firmware for other custom-ISA processors beyond PHY sequencers.\nExperience with Perforce or Git-based version control workflows.\nExperience using AI-assisted development tools for code review, documentation, or test generation.\nThe Team You'll Be Part Of\nYour recruiter will share more about the team structure and mission during the interview process.\nRewards and Benefits\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.","description_format":"text","description_chars":4887,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":true},"security_clearance":false,"languages":[{"language":"English","level":"Upper-Intermediate (B2)","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["EDA Software","Simulation & Digital Twin Software","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-10-14T10:33:58Z"}],"visa":[],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":1,"age_days":0,"expected_fill_days":12,"reasons":["conf:0","velocity","win:early","comp:brand"],"computed_at":"2026-10-15T05:46:00Z"},"pay":null,"html_url":"https://alion.io/job/synopsys-asic-digital-design-sr-engineer-18334","json_url":"https://alion.io/job/synopsys-asic-digital-design-sr-engineer-18334.json","meta":{"generated_at":"2026-10-15T13:14:17Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":20426,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-16T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":39954},"rest":"https://alion.io/mcp/rest/get_company?id=39954"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsynopsys-asic-digital-design-sr-engineer-18334"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsynopsys-asic-digital-design-sr-engineer-18334"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsynopsys-asic-digital-design-sr-engineer-18334"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/synopsys-asic-digital-design-sr-engineer-18334\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsynopsys-asic-digital-design-sr-engineer-18334"}]}