ASIC Digital Design, Sr Engineer-18899

Job Description and Requirements

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years moving between RTL and bare metal firmware, and you know that the hardest problems show up where those two worlds meet. SerDes IP does not forgive sloppy handoffs or assumptions that worked on the last project, and you have learned to design with that reality baked in from day one. You understand that silicon bring-up is where theory meets the bench, and you are the kind of engineer who stays calm when the prototype does not behave like the simulation said it would.

You do not wait for perfect specs. You ask the right questions, align with mixed-signal teams, and find a path through ambiguity without creating more downstream. When a junior engineer gets stuck on a timing closure issue or a register map conflict, you can walk them through it without taking over, because you have been there and you remember what actually helped.

You care about documentation and process, not because someone told you to, but because you have seen what happens when firmware gets handed off without it. At Synopsys, you will work on SerDes products that ship into real customer SoCs, and the decisions you make during development will matter long after tapeout.

What You'll Be Doing

• Design, develop, and validate bare metal firmware for NRZ and PAM-based SerDes IP targeting high-speed data recovery and serialization circuits
• Work directly with mixed-signal design and verification teams to integrate firmware with analog and digital subsystems from spec through silicon bring-up
• Execute silicon bring-up on prototype test chips, diagnosing and resolving functional and performance issues between RTL behavior and actual hardware
• Mentor junior firmware and digital design engineers on structured development flows, RTL debugging, and bring-up best practices
• Drive firmware development using structured processes including documentation, version control, and verification handoffs
• Collaborate with customer support and design groups to resolve integration issues and support SerDes IP deployment into customer SoCs
• Leverage AI tools like Cursor to accelerate development, debugging, and code quality without sacrificing rigor

The Impact You Will Have

• Your firmware will enable SerDes IP that powers high-speed interfaces in AI, automotive, and 5G applications shipping to customers globally
• The bring-up work you lead will directly determine whether prototype test chips meet performance targets and move to production on schedule
• Your mentorship will shape how junior engineers approach firmware design, RTL integration, and silicon debugging across the team
• The structured processes you help establish will reduce handoff friction between design, verification, and customer support teams
• Your ability to navigate ambiguity will keep projects moving even when specs evolve or silicon behaves unexpectedly
• The documentation and design decisions you make will carry forward into next-generation SerDes products and customer deployments
• Your work will help Synopsys maintain its position as the broadest silicon IP provider in the industry

What You'll Need

• Bachelor's or Master's in Electrical Engineering or equivalent practical experience
• 5+ years of hands-on experience in bare metal firmware development and silicon bring-up
• Strong digital design skills with deep understanding of RTL, synthesis, and timing closure
• Demonstrated ability to mentor engineers and provide technical leadership on complex projects
• Experience executing firmware projects from specification through silicon validation using structured development and verification processes
• Ability to work across design groups and customer support teams with clear, effective communication
• Knowledge of SerDes, Ethernet, or PCIe standards is a strong plus
• Proficiency with AI tools like Cursor for accelerating development workflows is a plus

Who You Are

• You can explain a register map conflict to a mixed-signal designer in two sentences without losing the technical nuance
• When a prototype does not match simulation, you methodically isolate the issue rather than guessing or escalating prematurely
• You balance design quality with deadlines, knowing when to push back and when to ship with documented trade-offs
• You treat documentation as part of the deliverable, not an afterthought, because you have inherited undocumented firmware before
• You are comfortable diving into unfamiliar territory, whether that is a new SerDes standard or a silicon bug that does not match any known pattern
• You stay current with tooling and methods, including AI-assisted development, and apply them where they genuinely improve outcomes

The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.