{"id":1311442,"url":"https://alion.io/job/synopsys-asic-digital-design-sr-staff-engineer-18568","title":"ASIC Digital Design, Sr Staff Engineer - 18568","company":{"id":39954,"name":"Synopsys","domain":"synopsys.com","url":"https://alion.io/company/synopsys-inc","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Avature","truth_index":{"grade":"A","score":100,"open_postings":74,"ghost_share":0.041,"stale_share":0,"repost_share":0.176,"time_to_fill_p50_days":15,"computed_at":"2026-10-26T05:57:25Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Maia, Portugal"],"countries":["PT"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":60000,"max_usd":127000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":646},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false}],"status":"live","first_seen_at":"2026-09-26T16:33:20Z","employer_posted_date":"2026-09-26","last_verified_at":"2026-10-26T05:57:17Z","board_verified":true,"closed_at":null,"days_open":29,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":29},"description":"Job Description and Requirements\nWe Are:\nAt Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.\nYou Are:\nYou are a highly skilled Verification Engineer with significant experience in ASIC digital verification and a deep understanding of HBM protocols. You thrive in complex problem-solving environments and are adept at working with sophisticated verification methodologies. You have a knack for identifying and addressing verification challenges, ensuring the delivery of high-quality, reliable products. Your collaborative spirit and excellent communication skills enable you to work effectively with cross-functional teams, driving project success through innovation and technical excellence.\nYou possess a strong foundation in digital design and verification, along with substantial experience in creating and executing verification plans. Your expertise in SystemVerilog, UVM, and other verification tools is complemented by your ability to mentor and guide junior engineers. You are proactive, detail-oriented, and committed to continuous learning and improvement, always staying abreast of the latest industry trends and technologies.\nWhat You’ll Be Doing:\nDeveloping and executing comprehensive verification plans for ASIC designs.\nCreating and maintaining testbenches using SystemVerilog and UVM methodologies.\nCollaborating with design and architecture teams to understand design specifications and requirements.\nIdentifying, isolating, and debugging issues in complex ASIC designs.\nImplementing and optimizing verification environments and test suites.\nReviewing and providing feedback on design and verification documentation.\nMentoring and guiding junior verification engineers.\nThe Impact You Will Have:\nEnsuring the reliability and performance of Synopsys' high-performance silicon chips.\nContributing to the successful delivery of cutting-edge technology solutions.\nEnhancing the efficiency and effectiveness of the verification process.\nDriving innovation and excellence within the verification team.\nImproving overall product quality and customer satisfaction.\nFostering a culture of continuous improvement and technical growth.\nWhat You’ll Need:\nExtensive experience in ASIC digital verification, particularly with HBM protocols.\nProficiency in SystemVerilog, UVM, and other verification tools and methodologies.\nStrong understanding of digital design principles and verification processes.\nExperience with simulation tools and debugging techniques.\nExcellent problem-solving skills and attention to detail.\nWho You Are:\nA proactive and self-motivated individual with a passion for technology.\nAn effective communicator with strong interpersonal skills.\nA collaborative team player who thrives in a dynamic work environment.\nA mentor and leader who can guide and inspire junior engineers.\nA continuous learner who stays updated with industry trends and advancements.\nThe Team You’ll Be A Part Of:\nYou will be part of our dynamic and innovative ASIC Digital Design team, focusing on the verification of high-performance silicon chips. Our team is dedicated to delivering top-notch products through rigorous verification processes and collaborative problem-solving. We work closely with design and architecture teams to ensure our solutions meet the highest standards of quality and reliability.\nRewards and Benefits:\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. 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