{"id":1577340,"url":"https://alion.io/job/synopsys-asic-digital-design-sr-staff-engineer-19066","title":"ASIC Digital Design, Sr Staff Engineer - 19066","company":{"id":39954,"name":"Synopsys","domain":"synopsys.com","url":"https://alion.io/company/synopsys-inc","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Avature","truth_index":{"grade":"A","score":100,"open_postings":75,"ghost_share":0.04,"stale_share":0,"repost_share":0.173,"time_to_fill_p50_days":15,"computed_at":"2026-10-21T05:46:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"inferred","locations":["Boxborough, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":132000,"max_usd":241000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":527},"experience_years_min":12,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2026-10-01T10:46:24Z","employer_posted_date":"2026-10-01","last_verified_at":"2026-10-21T12:48:51Z","board_verified":true,"closed_at":null,"days_open":20,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":20},"description":"Job Description and Requirements\nWe Are\nAt Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, enabling everything from self-driving cars to AI-powered systems. We lead in chip design, verification, and IP integration, empowering innovators to create high-performance silicon and software solutions. Join us and help shape the future of technology.\nYou Are\nA highly experienced digital design engineer with deep expertise in PHY architecture and RTL development. You bring a strong foundation in high-speed interface technologies such as DDR and UCIe, combined with hands-on experience delivering complex ASIC designs from concept through implementation. You thrive in collaborative environments, enjoy solving challenging technical problems, and are passionate about developing innovative semiconductor solutions.\nWhat You'll Be Doing\nArchitect, design, and develop high-performance digital logic for PHY, DDRIO, and UCIe-based solutions.\nDefine and implement RTL architectures while working closely with verification, physical design, and system teams.\nDrive chip- and block-level design activities through all phases of the ASIC development cycle.\nOptimize designs for performance, power, area (PPA), and product scalability.\nDevelop and evaluate complex physical IP solutions, including SERDES and DDR subsystems.\nReview designs and mentor engineers to ensure technical excellence and development best practices.\nCollaborate with cross-functional teams to deliver high-quality silicon solutions on schedule.\nThe Impact You Will Have\nEnable next-generation high-speed connectivity solutions used in advanced semiconductor products.\nInfluence architectural decisions that improve performance, power efficiency, and scalability.\nContribute to industry-leading PHY and interface IP development.\nDrive innovation that strengthens Synopsys' leadership in semiconductor design solutions.\nSupport technical growth across the engineering organization through collaboration and mentorship.\nWhat You'll Need\nRequired Qualifications\nBS in Electrical Engineering, Computer Engineering, or related field with 12+ years of relevant experience, or MS with 10+ years of experience.\nStrong experience in ASIC RTL design and digital logic development.\nExpertise in PHY design, DDRIO, UCIe, SERDES, or related high-speed interface technologies.\nSolid understanding of the complete SoC design cycle, from architecture through implementation.\nExperience with design verification methodologies and hardware debugging.\nStrong problem-solving, analytical, and communication skills.\nPreferred Qualifications\nExperience developing complex IPs for advanced process technologies.\nFamiliarity with low-power design techniques and clocking architectures.\nExperience mentoring engineers and leading technical projects.\nKnowledge of industry-standard EDA tools and design methodologies.\nWho You Are\nA collaborative engineer who enjoys working across multidisciplinary teams.\nA self-starter who can drive complex projects with minimal supervision.\nA creative problem solver with attention to detail and a commitment to quality.\nAn effective communicator who can simplify complex technical concepts.\nA mentor who enjoys helping others grow and succeed.\nThe Team You'll Be A Part Of\nYou will join a talented team responsible for developing next-generation PHY and interface IP solutions. The team works across architecture, RTL design, verification, and implementation to deliver industry-leading technologies that enable the world's most advanced semiconductor products.\nRewards and Benefits\nSynopsys offers a comprehensive and competitive benefits package designed to support your health, wellbeing, and financial future. Your recruiter can provide additional details regarding compensation, benefits, and total rewards during the hiring process.\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.\nIn addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.","description_format":"text","description_chars":4713,"description_truncated":false,"requirements":{"experience_years_min":12,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Equity"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["EDA Software","Application Security","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-10-01T10:46:24Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 178 · green card filings: 177","filings_12m":178,"filings_prev_12m":208,"green_card_filings_12m":177,"median_offered_wage_usd":157472,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":61},{"country":"GB","licensed_sponsor":true,"evidence":"Licensed UK visa sponsor (Skilled Worker)","filings_12m":null,"filings_prev_12m":null,"green_card_filings_12m":null,"median_offered_wage_usd":null,"route":"Skilled Worker","cap_exempt":false,"checked_at":"2026-10-21T06:25:45+00:00","sources":["UK Home Office: register of licensed sponsors (workers)"],"filings_for_role_12m":0}],"liveness":{"score":40,"band":"fade","label":"Fading","p_open":1,"p_active":0.72,"p_room":0.55,"age_days":19,"expected_fill_days":15,"reasons":["conf:2","velocity","win:tail","comp:brand"],"computed_at":"2026-10-21T05:46:15Z"},"pay":null,"html_url":"https://alion.io/job/synopsys-asic-digital-design-sr-staff-engineer-19066","json_url":"https://alion.io/job/synopsys-asic-digital-design-sr-staff-engineer-19066.json","meta":{"generated_at":"2026-10-21T15:01:45Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":21404,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-22T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":39954},"rest":"https://alion.io/mcp/rest/get_company?id=39954"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsynopsys-asic-digital-design-sr-staff-engineer-19066"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsynopsys-asic-digital-design-sr-staff-engineer-19066"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsynopsys-asic-digital-design-sr-staff-engineer-19066"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/synopsys-asic-digital-design-sr-staff-engineer-19066\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsynopsys-asic-digital-design-sr-staff-engineer-19066"}]}