{"id":2033025,"url":"https://alion.io/job/synopsys-asic-digital-design-staff-engineer-19010","title":"ASIC Digital Design, Staff Engineer- 19010","company":{"id":39954,"name":"Synopsys","domain":"synopsys.com","url":"https://alion.io/company/synopsys-inc","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Avature","truth_index":{"grade":"A","score":100,"open_postings":80,"ghost_share":0.038,"stale_share":0,"repost_share":0.188,"time_to_fill_p50_days":14,"computed_at":"2026-10-17T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hyderabad, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":27000,"max_usd":57000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":557},"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Synopsys Fusion Compiler","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-10-07T14:55:29Z","employer_posted_date":"2026-10-07","last_verified_at":"2026-10-18T02:21:25Z","board_verified":true,"closed_at":null,"days_open":10,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":10},"description":"Job Description and Requirements\nWe Are:\nAt Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.\nYou Are:\nYou are a seasoned digital design professional with a passion for architecting and implementing state-of-the-art ASIC solutions. Bringing over a decade of hands-on experience in RTL design, you thrive in complex, multi-site environments and are driven by the challenge of building high-performance IP Cores for consumer and automotive applications. Your expertise spans industry protocols such as UCIe, Ethernet, PCIe, DDR, MPHY,UFS,UNIPRO and more, making you a go-to technical leader for die-to-die communication solutions.\nYou possess a strong foundation in HDL design flows and have mastered tools including Verilog/SystemVerilog, synthesis, CDC analysis, and static timing. Your background includes the ability to define and drive micro-architectures from functional specifications, and you excel at balancing innovation with quality-driven processes. As a mentor and collaborator, you inspire teams to achieve technical excellence, and your communication skills allow you to interface seamlessly with global colleagues and customers.\nYou are proactive, detail-oriented, and committed to continuous learning and improvement. Your initiative and problem-solving abilities set you apart, and you are eager to contribute to a culture of innovation at Synopsys. If you’re ready to lead challenging projects and make a tangible impact on next-generation technology, this role is tailored for you.\nWhat You’ll Be Doing:\nArchitecting and implementing high-performance RTL designs for advanced IP cores, focusing on die-to-die communication protocols such as UCIe for consumer and automotive applications.\nCreating comprehensive architecture and micro-architecture documents, translating functional specifications into detailed design solutions for complex components.\nLeading and executing design tasks including RTL coding, synthesis, CDC analysis, debugging, and test development, ensuring robust and reliable ASIC designs.\nCollaborating closely with the verification team to plan, execute, and close verification cycles, achieving high coverage and design quality.\nInteracting with customers to clarify specification requirements and ensure design alignment with end-user needs.\nMentoring and technically leading a team of designers, fostering skill development and knowledge sharing within a global, multi-site environment.\nThe Impact You Will Have:\nDelivering cutting-edge IP cores that enable seamless, high-speed communication in next-generation chips for automotive and consumer products.\nDriving architectural innovation and protocol integration, positioning Synopsys as a leader in die-to-die and high-speed communication technologies.\nEnsuring the highest standards of design quality and reliability, contributing to the success of Synopsys customers worldwide.\nMentoring and uplifting team capabilities, fostering a culture of technical excellence and collaboration.\nAccelerating project timelines and reducing time-to-market for key IP solutions through expert technical leadership.\nEnhancing Synopsys’ reputation for delivering robust, scalable, and innovative silicon solutions in a fast-evolving industry.\nWhat You’ll Need:\nBSEE or MSEE in Electrical Engineering, with 7+ years of relevant industry experience in ASIC digital design.\nProficiency in one or more protocols: Ethernet, DDR, Die-to-Die Communication, PCIe, CXL, USB,MPHY,UFS,UNIPRO etc.\nExpertise in micro-architecture, RTL coding (Verilog/SystemVerilog), and design flows for ASIC implementation.\nHands-on experience with synthesis, CDC analysis, formal checking, and static timing analysis.\nFamiliarity with high-speed design, P&R-aware synthesis, and advanced tools such as Fusion Compiler.\nExperience with revision control systems (e.g., Perforce) and scripting languages like Perl/Shell.\nExposure to quality processes in IP design and verification.\nDemonstrated ability to technically lead and mentor a team of designers.\nWho You Are:\nInnovative and detail-oriented, with a relentless drive for technical excellence.\nExceptional communicator, adept at collaborating across global teams and with external customers.\nStrong problem-solver who thrives in challenging, fast-paced environments.\nTeam player who actively contributes to a collaborative and inclusive culture.\nNatural leader and mentor, inspiring others to achieve their best.\nProactive and adaptable, always seeking opportunities to learn and improve.\nThe Team You’ll Be A Part Of:\nYou’ll join the DesignWare IP Design R&D team at Synopsys’ Hyderabad Design Center, collaborating with a diverse group of expert engineers across multiple global sites. The team specializes in developing high-performance, synthesizable IP cores for a wide range of applications, emphasizing innovation, quality, and customer success. You’ll be immersed in a supportive environment that values technical growth, knowledge sharing, and continuous improvement.\nRewards and Benefits:\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.","description_format":"text","description_chars":6202,"description_truncated":false,"requirements":{"experience_years_min":7,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":["Continuous learning"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["EDA Software","Application Security","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-10-07T14:55:29Z"}],"visa":[],"liveness":{"score":72,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.804,"p_room":0.9,"age_days":9,"expected_fill_days":14,"reasons":["conf:0","velocity","win:mid","comp:brand"],"computed_at":"2026-10-17T05:46:00Z"},"pay":null,"html_url":"https://alion.io/job/synopsys-asic-digital-design-staff-engineer-19010","json_url":"https://alion.io/job/synopsys-asic-digital-design-staff-engineer-19010.json","meta":{"generated_at":"2026-10-18T02:30:13Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":4050,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-19T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":39954},"rest":"https://alion.io/mcp/rest/get_company?id=39954"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsynopsys-asic-digital-design-staff-engineer-19010"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsynopsys-asic-digital-design-staff-engineer-19010"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsynopsys-asic-digital-design-staff-engineer-19010"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/synopsys-asic-digital-design-staff-engineer-19010\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsynopsys-asic-digital-design-staff-engineer-19010"}]}